• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.950-956
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• 1986

In this paper, a direct addressing mode of a microprocessor is introduced to save memory capacity, and also a dedicated digital filter is constructed to speed up the filter processing and to enable an easy selection of the impulse response types. A theoretical analysis has been conducted on the errors caused by the finite word klength, rounding-off and multiplication procedures. The digital filter designed by the proposed method is made into a module which can function as a 7th-order recursive or a 14-order nonrecursive type with a simples witch operation. The proposed filter is implemented on a printed-circuit board. The frequency characteristics of this filter can be controlled by the multiplication values stored in ROMs. A low-pass, a high-pass and a band-pass filter have been designed and their frequency characteristics are verified by actual measurements. For a order higher filer, two filter modules have been cascaded into an integrated filter of 23rd-order non-recursive low-pass type and a 12th-order recursive multiband type. Their frequency characteirstics have been found to agree with the theory.

• Journal of Advanced Marine Engineering and Technology
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• v.19 no.4
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• pp.79-91
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• 1995

Recently, the AC motor which has a simple structure and needs less maintenance has become to be used frequently as a servomotor for position control in the automatic control field. This paper concerns with a method to improve the current and power waveforms of an AC motor, and the current waveforms and 3$\phi$ power waveforms are analyzed by FFT under verious running conditions. The system is composed of a digital bridge inverter, low pass LC filter, and 3$\phi$ AC motor. Through the computer simulations and experiments, it is confirmed that current waveforms and $\phi$ power waveforms con by improved by utilizing the high order low pass LC filter than that of lower order.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.7
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• pp.998-1000
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• 2012

By cascading RHTL (Right-Handed Transmission Line) and LHTL (Left-Handed Transmission Line), we fabricated a BPF (Band Pass Filter) in which the phase propagation at the pass band center frequency is fixed as we want. We utilized a positive phase propagation of a RHTL which is a form of LPF (Low Pass Filter) and negative phase propagation of LHTL which is a form of HPF (High Pass Filter). Therefore, if RHTL and LHTL are cascaded, a BPF can be constructed and the phase propagation inside the passband is decided by the number of RHTLs and LHTLs. In this paper, we provide a detailed theory related to it and proved the theory with an actual experiment. In the experiment, we fabricated two BPFs with similar passband. One with $90^{\circ}$ phase shift and the other with $-90^{\circ}$ phase shift at the center of passband. The result of simulation and actual experiment agrees well. This proves the suggested theory is correct and feasible.

• Journal of the Korea Society of Computer and Information
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• v.7 no.3
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• pp.56-59
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• 2002

In this study, new serial and parallel resistor and capacitor-frequency-dependent negative resistance configurations are implemented that use one plus type four-terminal floating nullor(FTFN) and three passive components. The values of simulated elements can be orthogonally adjusted without any matching condition. High pass filter designed with this FTFN and AD844. Computer simulation was performed using the AD844 macro model by HSPICE. Simulated results agree well with theoretical values.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.2
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• pp.227-232
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• 1988

A semicustom VLSI design fo digital filters used in TDM/FDM transmultiplexer is described. A filter bank composed of only all-pass digital filter sections are implemented with the polyphase network. The use of all-pass filters as basic building blocks is shown to provide a trans-multiplexer structure that has low computational requirements, low quantization noise, and high modularity. The silicon compiler system is used to reduce the design time and to increase the credibility of designed filters. As a prototype, 1st and 2nd order all pass filter are designed, using CMOS N-well double metal technology. The chip sizes of first order filter and the second order filter are 2652 x 533\ulcorner\ulcorner 5334x4300\ulcorner\ulcorner respectively.

• ETRI Journal
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• v.28 no.3
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• pp.401-404
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• 2006

A new log-domain first-order multifunction filter is proposed in this letter. The proposed filter is systematically derived using the state-space synthesis procedure from a corresponding block diagram. It provides low-pass (LP), high-pass (HP), and all-pass (AP) responses simultaneously for a single input signal. The filter circuit has a very simple structure since it uses only bipolar junction transistors (BJTs) and a grounded capacitor. It can be electronically tuned by changing an external current. The filter has a greater bandwidth due to its inherent current-mode and log-domain operations. PSPICE simulations are given to confirm the theoretical analysis.

• Journal of Advanced Marine Engineering and Technology
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• v.22 no.4
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• pp.538-550
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• 1998

The variable frequency and variable voltage AC source made by a conventional inverter which is composed of power semi-conductors includes much noises in sine wave due to high frequency switching of DC source. In this paper the 3rd low pass LC filter for a variable speed 3 phase induction motor driven by a full bridge inverter is introduced to solve the EMI problem by serious noise current. The utility of a modified 3rd order Butterworth LC filter is confirmed through FFT analysis of sine waves and noiseless ACsource can be obtained by the proposed LC filter. The speed of a 3 phase induction motor driven by a full bridge inverter with a LC filter is satisfactorily controlled by a digital PID controller under the condition of stepwise load and setpoint changes.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.2
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• pp.109-116
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• 2022

In this paper, we propose a band rejection filter (BRF) with a state variable filter (SVF) structure to effectively remove the influence of 60 Hz line frequency noise introduced into the sensor system. The conventional BRF of the SVF structure uses an additional operational amplifier (OPAMP) to add a low pass filter (LPF) output and a high pass filter (HPF) output or an input signal and a band pass filter. Therefore, the notch frequency and the notch depth that determine the signal attenuation of the BRF greatly depend on the tolerance of the resistors used to obtain the sum or difference of the signals. On the other hand, in the proposed BRF, since the BRF output is formed naturally within the SVF structure, there is no need for a combination between each port. The notch frequency of the proposed BRF is 59.99 Hz, and it can be confirmed that it is not affected at all by the tolerance of the resistor through the Monte Carlo simulation results. The notch depth also has an average of -42.54dB and a standard deviation of 0.63dB, confirming that normal operation as a BRF is possible. Also, with the proposed BRF, noise filtering was applied to the electrocardiogram (ECG) signal that interfered with 60 Hz noise, and it was confirmed that the 60 Hz noise was appropriately suppressed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.282-291
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• 2010

This paper presents a full-CMOS transmitter and receiver for VDSL2 systems. The transmitter part consists of the low-pass filter, programmable gain amplifier (PGA) and 14-bit DAC. The receiver part consists of the low-pass filter, variable gain amplifier (VGA), and 13-bit ADC. The low pass filter and PGA are designed to support the variable data rate. The RC bank sharing architecture for the low pass filter has reduced the chip size significantly. And, the 80 Msps, high resolution DAC and ADC are integrated to guarantee the SNR. Also, the transmitter and receiver are designed to have a wide dynamic range and gain control range because the signal from the VDSL2 line is variable depending on the distance. The chip is implemented in 0.25 ${\mu}m$ CMOS technology and the die area is 5 mm $\times$ 5 mm. The spurious free dynamic range (SFDR) and SNR of the transmitter and receiver are 67.5 dB and 41 dB, respectively. The power consumption of the transmitter and receiver are 160 mW and 250 mW from the supply voltage of 2.5 V, respectively.

• Current Optics and Photonics
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• v.2 no.6
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• pp.563-567
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• 2018

We propose and experimentally demonstrate a simple tunable photonic microwave band-pass filter with high resolution using a reflective semiconductor optical amplifier (RSOA) and an optical time-delay line. The RSOA is used as a gain medium for generating cross-gain modulation (XGM) effect as well as an optical source. The optical source provides narrow spectral width by self-injection locking the RSOA in conjunction with a partial reflection filter with specific center wavelength. Then, when the RSOA is operated in the saturation region and the modulated recursive signal is injected into the RSOA, the recursive signal is inversely copied to the injection locked optical source due to the XGM effect. Also, the tunability of the passband of the proposed microwave filter is shown by controlling an optical time-delay line in a recursive loop.