• 한국전기전자재료학회논문지
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• 제14권7호
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• pp.572-577
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• 2001

The electrical properties of Pr$_{6}$ O$_{11}$ -based ZnO varistors consisting of ZnO-Pr$_{6}$ O$_{11}$ -CoO-Cr$_2$O$_3$-Er$_2$O$_3$ ceramics were investigated with sintering temperature in the range of 1325~f1345$^{\circ}C$. As sintering temperature is raised., the nonlinear exponent was increased up to 1335$^{\circ}C$, reaching a maximum 70.53, whereas raising sintering temperature further caused it to decrease, reaching a minimum 50.18 and the leakage current was in the range of 1.92~4.12 $\mu$A. The best electrical properties was obtained from the varistors sintered at 1335$^{\circ}C$, exhibiting a maximum (70.53) in the nonlinear exponent and a minimum (1.92 $\mu$A) in the leakage current, and a minimum (0.035) in the dissipation factor. On the other hand, the donor concentration was in the range of (0.90~1.14)x10$^{18}$ cm$^{-3}$ , the density of interface states was in the range of (2.69~3.60)x10$^{12}$ cm$^{-2}$ , and the barrier height was in the range of 0.77~1.21 eV with sintering temperature. With raising sintering temperature, the variation of C-V characteristic parameters exhibited a mountain type, reaching maximum at 134$0^{\circ}C$. Conclusively, it was found that the V-I, C-V, and dielectric characteristics of Pr$_{6}$ O$_{11}$ -based ZnO varistors are affected greatly by sintering temperature.

• 한국지구과학회지
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• 제42권6호
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• pp.605-622
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• 2021

Seasonal forecasting has numerous socioeconomic benefits because it can be used for disaster mitigation. Therefore, it is necessary to diagnose and improve the seasonal forecast model. Moreover, the model performance is partly related to the ocean model. This study evaluated the hindcast performance in the upper ocean of the Global Seasonal Forecasting System version 5-Global Couple Configuration 2 (GloSea5-GC2) using a multivariable integrated evaluation method. The normalized potential temperature, salinity, zonal and meridional currents, and sea surface height anomalies were evaluated. Model performance was affected by the target month and was found to be better in the Pacific than in the Atlantic. An increase in lead time led to a decrease in overall model performance, along with decreases in interannual variability, pattern similarity, and root mean square vector deviation. Improving the performance for ocean currents is a more critical than enhancing the performance for other evaluated variables. The tropical Pacific showed the best accuracy in the surface layer, but a spring predictability barrier was present. At the depth of 301 m, the north Pacific and tropical Atlantic exhibited the best and worst accuracies, respectively. These findings provide fundamental evidence for the ocean forecasting performance of GloSea5.

• 반도체디스플레이기술학회지
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• 제21권4호
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• pp.138-143
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• 2022

We analyzed the influence of post-annealing on Ga₂O₃/n-type 4H-SiC heterojunction diode. Gallium oxide (Ga₂O₃) thin films were deposited by radio frequency (RF) sputtering. Post-deposition annealing at 950℃ in an Oxygen atmosphere was performed. The material properties of Ga₂O₃ and the electrical properties of the diodes were investigated. Atomic Force Microscopy (AFM), X-Ray Diffraction and Scanning Electron Microscope (SEM) images show a significant increase in the roughness and crystallinity of the O₂-annealed films. After Oxygen annealing X-ray Photoelectron Spectroscopy (XPS) shows that the atomic ratio of oxygen increases which is related to a decrease in oxygen vacancy within the Ga₂O₃ film. The O₂-annealed diodes exhibited higher on-current and lower leakage current. Moreover, the ideality factor, barrier height, and thermal activation energy were derived from the current-voltage curve by increasing the temperature from 298 - 434K.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.118-118
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• 2011

The Nano-Floating Gate Memory(NFGM) devices with ZnO:Cu thin film embedded in Al2O3 and AlOx-SAOL were fabricated and the electrical characteristics were evaluated. To further improve the scaling and to increase the program/erase speed, the high-k dielectric with a large barrier height such as Al2O3 can also act alternatively as a blocking layer for high-speed flash memory device application. The Al2O3 layer and AlOx-SAOL were deposited by MLD system and ZnO:Cu films were deposited by ALD system. The tunneling layer which is consisted of AlOx-SAOL were sequentially deposited at $100^{\circ}C$. The floating gate is consisted of ZnO films, which are doped with copper. The floating gate of ZnO:Cu films was used for charge trap. The same as tunneling layer, floating gate were sequentially deposited at $100^{\circ}C$. By using ALD process, we could control the proportion of Cu doping in charge trap layer and observe the memory characteristic of Cu doping ratio. Also, we could control and observe the memory property which is followed by tunneling layer thickness. The thickness of ZnO:Cu films was measured by Transmission Electron Microscopy. XPS analysis was performed to determine the composition of the ZnO:Cu film deposited by ALD process. A significant threshold voltage shift of fabricated floating gate memory devices was obtained due to the charging effects of ZnO:Cu films and the memory windows was about 13V. The feasibility of ZnO:Cu films deposited between Al2O3 and AlOx-SAOL for NFGM device application was also showed. We applied our ZnO:Cu memory to thin film transistor and evaluate the electrical property. The structure of our memory thin film transistor is consisted of all organic-inorganic hybrid structure. Then, we expect that our film could be applied to high-performance flexible device.----못찾겠음......

• 한국전기전자재료학회논문지
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• 제19권9호
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• pp.818-824
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• 2006

The effects of high-temperature process required to fabricate the SiC devices on the surface morphology and the electrical characteristics were investigated for 4H-SiC Schottky diodes. The 4H-SiC diodes without a graphite cap layer as a protection layer showed catastrophic increase in an excess current at a forward bias and a leakage current at a reverse bias after high-temperature annealing process. Moreover it seemed to deviate from the conventional Schottky characteristics and to operate as an ohmic contact at the low bias regime. However, the 4H-SiC diodes with the graphite cap still exhibited their good electrical characteristics in spite of a slight increase in the leakage current. Therefore, we found that the graphite cap layer serves well as the protection layer of silicon carbide surface during high-temperature annealing. Based on a closer analysis on electric characteristics, a conductive surface transfiguration layer was suspected to form on the surface of diodes without the graphite cap layer during high-temperature annealing. After removing the surface transfiguration layer using ICP-RIE, Schottky diode without the graphite cap layer and having poor electrical characteristics showed a dramatic improvement in its characteristics including the ideality factor[${\eta}$] of 1.23, the schottky barrier height[${\Phi}$] of 1.39 eV, and the leakage current of $7.75\{times}10^{-8}\;A/cm^{2}$ at the reverse bias of -10 V.

• 한국화재소방학회논문지
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• 제33권4호
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• pp.121-129
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• 2019

정부는 2015년 보다 체계적이고 안전하게 화학물질을 관리하고 취급 할 수 있도록 법 제명 변경과 함께 「화학물질관리법」을 전부개정 하였으며, 특히 유해화학물질을 제조·저장·보관하는 취급시설의 설치 및 관리 기준을 대폭 강화하였다. 하지만, 일부 취급시설 기준의 경우 물리적인 공간부족과 시설개선과정 중 사고발생우려 등의 이유로 강화된 기준을 이행하기 어려운 상황이 생김에 따라 이러한 시설에 대해 2018년부터 "안전성평가"라는 특례를 운영하고 있다. 본 연구에서는 유해화학물질 누출궤적 평가모듈 개발을 통해 현장에 설치된 염산과 황산 저장탱크의 방류벽 높이 적정성을 검증하고 이격거리에 따른 방류벽 높이를 제시하였다. 이를 활용하여 산업현장에서는 보다 손쉽게 해당 취급시설의 안전성 평가 특례신청이 가능할 것으로 판단된다. 또한, 본 연구의 결과는 유해화학물질 취급시설의 설계에도 활용하여 유해화학물질 취급시설의 안전성 향상에 기여할 것으로 기대된다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 춘계학술대회 논문집
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• pp.14-16
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• 2008

Built-in voltage in organic light-emitting diodes was studied using modulated photocurrent technique ambient conditions. From the bias voltage-dependent photocurrent, built-in voltage of the device is determined. The applied bias voltage when the magnitude of modulated photocurrent is zero corresponds to a built-in voltage. Built-in voltage in the device is generated due to a difference of work function of the anode and cathode. A device was made with a structure of anode/$Alq_3$/cathode to study a built-in voltage. ITO was used as an anode, and Al and LiAl were used as a cathode. A layer thickness of Al and LiAl were 100nm. Obtained built-in voltage is about 1.0V in the Al layer was used as a cathode. The obatined built-in voltage is about 1.6V in the LiAl layer was used as a cathode. The result of built-in voltage is dependent of cathode. We can see that the built-in voltage increase up to 0.4V when the LiAl layer was used as the cathode. These results correspond to the work function of LiAl which is lower than that of Al. As a result, the barrier height for an electron injection from the cathode to the organic layer could be lowered when the LiAl was used as a cathode.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.291.1-291.1
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• 2016

Graphene by one of the two-dimensional (2D) materials has been focused on electronic applications due to its ultrahigh carrier mobility, outstanding thermal conductivity and superior optical properties. Although graphene has many remarkable properties, graphene devices have low on/off current ratio due to its zero bandgap. Despite considerable efforts to open its bandgap, it's hard to obtain appropriate improvements. To solve this problem, heterojunction barristor was proposed based on graphene. Mostly, this heterojunction barristor is made by transition metal dichalcogenides (TMDs), such as molybdenum disulfide ($MoS_2$) and tungsten diselenide ($WSe_2$), which have extremely thickness scalability of TMDs. The heterojunction barristor has the advantage of controlling graphene's Fermi level by applying gate bias, resulting in barrier height modulation between graphene interface and semiconductor. However, charged impurities between graphene and $SiO_2$ cause unexpected p-type doping of graphene. The graphene's Fermi level modulation is expected to be reduced due to this p-doping effect. Charged impurities make carrier mobility in graphene reduced and modulation of graphene's Fermi level limited. In this paper, we investigated theoretically and experimentally a relevance between graphene's Fermi level and p-type doping. Theoretically, when Fermi level is placed at the Dirac point, larger graphene's Fermi level modulation was calculated between -20 V and +20 V of $V_{GS}$. On the contrary, graphene's Fermi level modulation was 0.11 eV when Fermi level is far away from the Dirac point in the same range. Then, we produced two types heterojunction barristors which made by p-type doped graphene and graphene treated 2.4% APTES, respectively. On/off current ratio (32-fold) of graphene treated 2.4% APTES was improved in comparison with p-type doped graphene.

• 한국전기전자재료학회논문지
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• 제22권1호
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• pp.22-28
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• 2009

We investigated the sintering and electric properties of ZnO-1.0 at% $TeO_2$ (ZT1) and 1.0 at% Mn-doped ZT1(ZT1M1) system. $TeO_2$ itself melts at $732^{\circ}C$ in air but forms the $ZnTeO_3$ or $Zn_2Te_3O_8$ phase with ZnO as increasing temperature and therefore retards the densification of ZnO to $1000^{\circ}C$. In ZT1M1 system, also, the densification of ZnO was retarded up to $1000^{\circ}C$ and then reached > 90% of theoretical density above $1100^{\circ}C$. It was found that a good varistor characteristics(nonlinear coefficient $a{\sim}60$) were developed in ZT1M1 system sintered at $1100^{\circ}C$ due to Mn which known as improving the nonlinearity of ZnO varistors. The results of C-V characteristics such as barrier height (${\Phi}_b$), donor density ($N_D$), depletion layer (W), and interface state density ($N_t$) in ZT1M1 ceramics were $1.8{\times}10^{17}cm^{-3}$, 1.6 V, 93 nm, and $1.7{\times}10^{12}cm^{-2}$, respectively. Also we measured the resistance and capacitance of grain boundaries with temperature using impedance and electric modulus spectroscopy. It will be discussed about the stability and homogeneity of grain boundaries using distribution parameter ($\alpha$) simulated with the Z(T)"-logf plots.

• 센서학회지
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• 제14권2호
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• pp.96-100
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• 2005

The planar Schottky diodes were fabricated and modeled to probe the device applicability of the cracked GaN epitaxial layer on a (111) silicon substrate. On the unintentionally n-doped GaN grown on silicon, we deposited Ti/Al/Ni/Au as the ohmic metal and Pt as the Schottky metal. The ohmic contact achieved a minimum contact resistivity of $5.51{\times}10.5{\Omega}{\cdot}cm^{2}$ after annealing in an $N_{2}$ ambient at $700^{\circ}C$ for 30 sec. The fabricated Schottky diode exhibited the barrier height of 0.7 eV and the ideality factor was 2.4, which are significantly lower than those parameters of crack free one. But in photoresponse measurement, the diode showed the peak responsivity of 0.097 A/W at 300 nm, the cutoff at 360 nm, and UV/visible rejection ratio of about $10^{2}$. The SPICE(Simulation Program with Integrated Circuit Emphasis) simulation with a proposed model, which was composed with one Pt/GaN diode and three parasitic diodes, showed good agreement with the experiment.