• Title/Summary/Keyword: Harmonic blocking

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Power Factor Improvement of Single-Phase Three-level Boost Converter (단상 Three-level boost converter의 역률개선)

  • 서영조
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.384-387
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    • 2000
  • In this paper Power factor correction circuit of single-phase three-level boost converter is proposed. The advantage of the proposed control scheme for three-level boost converter are low blocking voltage of each power device low THD(Total Harmonic Distortion) and high power factor. The control scheme is based on the current comparator capacitor compensator and region detector, In simulations the proposed system is validated.

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A Novel Multi-Level Inverter Configuration for High Voltage Conversion System

  • Suh, Bum-Seok;Lee, Yo-Han;Hyun, Dong-Seok
    • Journal of Electrical Engineering and information Science
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    • v.1 no.2
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    • pp.109-118
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    • 1996
  • This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

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Estimation of Delta Winding Current and Its Application to a Compensated-Current-Differential Relay for a Y-Δ Transformer

  • Kang, Yong-Cheol;Lee, Byung-Eun;Jin, En-Shu
    • Journal of Electrical Engineering and Technology
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    • v.5 no.2
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    • pp.255-263
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    • 2010
  • The compensated-current-differential relay uses the same restraining current as a conventional relay, but the differential current is modified to compensate for the effects of the exciting current. Delta winding current is necessary to obtain the modified differential current for a $Y-\Delta$ transformer. This paper describes an estimation algorithm of the delta winding current and its application to a compensated-current-differential relay for a $Y-\Delta$ transformer. Prior to saturation, the core-loss current is calculated and used to modify the differential current. When the core first enters saturation, the initial value of the core flux is obtained by inserting the modified differential current into the magnetization curve. This flux value is used to derive the magnetizing current and consequently the modified differential current. The operating performance of the proposed relay was compared against a conventional current differential relay with harmonic blocking. Test results indicate that the proposed relay remained stable during severe magnetic inrush and over-excitation, and its operating time is significantly faster than a conventional relay. The relay is unaffected by the level of remanent flux and does not require an additional restraining or blocking signal to maintain stability. This paper concludes by implementing the proposed algorithm into a prototype relay based on a digital signal processor.

Design of An Amplifier using DGS Block (DGS 방식 DC Block을 이용한 증폭기의 설계)

  • 이경희;정용채
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.3
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    • pp.432-438
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    • 2001
  • In this paper, after applying Defected Ground Structure(DGS) to DC block, changes of gap and length of λ/4 coupled line are investigated by EM simulation and fabrication. As a result, on condition of the same output with the case using typical DC block, the gap between λ/4 coupled line is widen from 0.1 mm to 0.46 mm by 0.36 mm and the length of λ/4 coupled line gets shorter from 17.7 mm to 13.2 mm by 4.5 mm. Also three type power amplifiers using blocking capacitor, typical DC block and DGS DC block are fabricated and investigated. At first, when S parameter characteristics of each amplifier are considered at frequency band of 3.2 +-0.O5 GHz, every amplifier has similar characteristics of gain and S parameter. Second when the output power of amplifiers is 25 dBm after putting CW signal of 3.2 GHz into three type amplifiers, the difference of dominant signal and 2nd harmonic signal using blocking capacitor, typical DC block and DGS DC block is each -44.83 dBc, -66.84 dBc and -64.33 dBc. Therefore harmonic characteristics of amplifiers using typical DC block and DGS DC block is almost same.

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A New Switching Method for 3-level GTO Inverter Considering DC-link Voltage Balancing and Minimum on/off time (DC-링크 전압균형과 최소 온-오프 시간을 고려한 새로운 3-레벨 GTO 인버터 제어기법)

  • Lee, Yo-Han;Hyun, Dong-Seok
    • Proceedings of the KIEE Conference
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    • 1994.07a
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    • pp.373-375
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    • 1994
  • In realizing a three-level GTO inverter, we should keep the voltage balancing of DC-link capacitors and consider minimum on/off time of GTO thyristors in order to make the same blocking voltage across each device and to minimize the harmonic components of the output voltage and current. In this raper, a new PWM scheme based on space voltage vectors, by which it is possible to keep neutral-point voltage and avoid narrow pulse, is presented. Experimental results verify that the proposed PWM control scheme is suitable fur hish power and high voltage three-level GTO inverters applied to induction motor drives.

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Development of a Switched Diode Asymmetric Multilevel Inverter Topology

  • Karthikeyan, D.;Krishnasamy, Vijayakumar;Sathik, Mohd. Ali Jagabar
    • Journal of Power Electronics
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    • v.18 no.2
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    • pp.418-431
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    • 2018
  • This paper presents a new asymmetrical multilevel inverter with a reduced number of power electronic components. The proposed multilevel inverter is analyzed using two different configurations: i) First Configuration (with a switched diode) and ii) Second Configuration (without a switched diode). The presented topologies are compared with recent multilevel inverter topologies in terms of number of switches, gate driver circuits and blocking voltages. The proposed topologies can be cascaded to generate the maximum number of output voltage levels and they are suitable for high voltage applications. Various power quality issues are addressed for both of the configurations. The proposed 11-level inverter configuration is simulated using MATLAB and it is validated with a laboratory based experimental setup.

A Study on the Adaptive Single Pole Auto-Reclosure Techniques for Transmission Lines Based on Discrete Fourier Transform (DFT를 이용한 송전선로 적응적 단상재폐로 방안에 관한 연구)

  • Radojevic, Zoran;Kang, Seung-Ho;Park, Jang-Soo
    • Proceedings of the KIEE Conference
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    • 2002.07a
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    • pp.166-168
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    • 2002
  • This paper presents a new numerical algorithm suitable for defining recloser reclaims time and blocking automatic reclosing during permanent faults on overhead lines. It is based on terminal voltage input data processing. The decision if it is safe or not to reclose is determined from the voltage signal of faulted and tripped line phase using Total Harmonic Distortion factor calculated by Discrete Fourier Transform. The algorithm was successfully tested using signals recorded on the real power system. The tests demonstrate the ability of presented algorithm to determine the secondary arc extinction time and to block unsuccessful automatic reclosing of HV lines with permanent fault.

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Induced Second Order Optical Nonlinearity in Thermally Poled Silica Glasses (Poling된 실리카 유리의 2차비선형광학효과와 공간전하분극의 관계)

  • 신동욱
    • Journal of the Korean Ceramic Society
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    • v.36 no.12
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    • pp.1374-1380
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    • 1999
  • The cause of Scond Harmonic Generation (SHG) in thermally poled silica glass is suggested basedon the electrical and dielectric relaxation measurements. The absorption currents as functions of time were measured for various types of silica glasses and analyzed by the theory of Space Charge Polarization. Space charge polarization occurs when an ionic conducting material is subjected to dc electric field with blocking electrode. Thermal poling performed to induce SHG in silica glass is basically identical to the process generating space charge polarization. Hence it was found that gene-ration removal reproduction and temperature dependence of SHG in poled silica is directly related to those of space charge polarization. It turned out that the fundamental parameters governing the SHG in poled silica are charge carrier concentration and mobility. Based on the theory of space charge polarization and experimental results of electrical rela-xation the method to increase the intensity of SHG is proposed.

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Computer Simulation Analysis on 2nd Order Optical Nonlinearity in Poled Silica Glass (Poling된 실리카 유리의 2차 비선형 광특성에 대한 전산모사 해석)

  • 이승규;유웅현;신동욱;정용재
    • Proceedings of the Optical Society of Korea Conference
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    • 2001.02a
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    • pp.230-231
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    • 2001
  • Silica glass is a core material for optical fiber in optical telecommunications, but its centrosymmetry eliminates the second order nonlinearity. But it is experimentally well known that the space charge polarization induces the Second Harmonic Generation (SHG) when a strong DC voltage is applied to silica glass for a long period time with metal blocking electrodes. In this research, a theoretical calculation of the nonlinear optical property caused by the space charge polarization is performed, and a model of a numerical analysis to predict the small change in nonlinear optical property as functions of time and space is provided.

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A Current Differential Relaying Algorithm for Power Transformers Using an Advanced Compensation Algorithm of CTs (잔류자속에 무관한 전류보상 알고리즘을 적용한 변압기 보호용 전류차동 계전방식)

  • Kang, Y.C.;Lim, U.J.;Yun, J.S.;Jin, E.S.;Won, S.H.
    • Proceedings of the KIEE Conference
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    • 2003.07a
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    • pp.314-316
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    • 2003
  • To prevent maloperation during magnetic inrush and over-excitation, a current differential relay for power transformers uses harmonic current based restraining or blocking scheme; it also uses dual slope characteristics to prevent maloperation for an external fault with CT saturation. This paper proposes a current differential relaying algorithm for power transformers with an advanced compensation algorithm for the secondary current of CTs. The comparative study was conducted with and without the compensating algorithm. The algorithm can reduce the operating time of the relay in the case of an internal fault and improve security for external faults.

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