• 제목/요약/키워드: Hardware sharing

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A Study on the novel ICT baced Services : Focused on N-Device Smart Education Services (새로운 ICT 기반 서비스에 대한 연구 : N-디바이스 스마트교육 서비스를 중심으로)

  • Kang, Sang-Ug;Park, Seungbum
    • Journal of Information Technology Services
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    • v.11 no.3
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    • pp.161-175
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    • 2012
  • A novel concept of ICT based service, which is called N-device service, is proposed and implemented in the form of N-device smart education services. The N-device services are different from the existing N-screen services in terms of the number of devices a user is using for a specific service at the same time. A N-device service consists of several smart devices which are different in size, software and hardware platform, mobility, manufacturer and the like by fully utilizing the characteristic of each device. The major and unique features of N-device services are analyzed and depicted in a strict way. Those are shared role for each device, service by configurable device, one sensor multiple use, real-time data sharing, role shifting and new market creation. It is turned out that the N-device service is more human centric compared with existing ICT based services and can give richer digital experience to users because non-existent services become possible with the new concept. However, there exist several barriers to be implemented and commercialized in the real world. Those include high development cost and time, small market and different application platforms of devices. These barriers can be overcome by technical advances and cooperation between relevant parties. The smart education is very prominent area, in which the novel concept can be applied with high priority because Korean government announced its plan to boost up new educational services with big budget and these are acceptable by enthusiastic Korean parents and students. That's why the N-device service is implemented in the education area, which is called as "livessam(live teacher)," with four smart devices, IPTV, tablet PC, PC and smart phone. By providing both detailed service scenario and techniques, we shows that the novel education service is technically feasible and acceptable by teachers and students.

A New Arithmetic Unit Over GF(2$^{m}$ ) for Low-Area Elliptic Curve Cryptographic Processor (저 면적 타원곡선 암호프로세서를 위한 GF(2$^{m}$ )상의 새로운 산술 연산기)

  • 김창훈;권순학;홍춘표
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.7A
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    • pp.547-556
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    • 2003
  • This paper proposes a novel arithmetic unit over GF(2$^{m}$ ) for low-area elliptic curve cryptographic processor. The proposed arithmetic unit, which is linear feed back shift register (LFSR) architecture, is designed by using hardware sharing between the binary GCD algorithm and the most significant bit (MSB)-first multiplication scheme, and it can perform both division and multiplication in GF(2$^{m}$ ). In other word, the proposed architecture produce division results at a rate of one per 2m-1 clock cycles in division mode and multiplication results at a rate of one per m clock cycles in multiplication mode. Analysis shows that the computational delay time of the proposed architecture, for division, is less than previously proposed dividers with reduced transistor counts. In addition, since the proposed arithmetic unit does not restrict the choice of irreducible polynomials and has regularity and modularity, it provides a high flexibility and scalability with respect to the field size m. Therefore, the proposed novel architecture can be used for both division and multiplication circuit of elliptic curve cryptographic processor. Specially, it is well suited to low-area applications such as smart cards and hand held devices.

An Efficient SoC Test Architecture for Testing Various Cores in Parallel (다양한 코어의 병렬 테스트를 지원하는 효과적인 SOC 테스트 구조)

  • Kim, Hyun-Sik;Kim, Yong-Joon;Park, Hyun-Tae;Kang, Sung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.10 s.352
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    • pp.140-150
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    • 2006
  • In this paper, we present a new hardware architecture for testing various cores embedded in SoC. The conventional solutions need much testing time since only one core is tested at single test period. To enhance this, S-TAM, a novel test architecture, and its controller which enable parallel testing of various cores are proposed. S-TAM supports bus sharing to broadcast testing and cores to be tested are selected by using it. In addition, S-TAM controller enables the effective SoC test by simultaneous controlling the various test cores which are based on the different test architectures like IEEE 1149.1 and IEEE 1500.

Construction of Complemented Hybrid Group Cellular Automata with Maximum Equal Lengths (최대 동일 길이를 갖는 여원 HGCA구성)

  • Cho S.J.;Choi U.S.;Hwang Y.H.;Kim J.G.;Pyo Y.S.;Kim H.D.
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.9
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    • pp.1565-1572
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    • 2006
  • Recently with the ever increasing growth of data communication, the need for security and privacy has become a necessity. The advent of wireless communication and other handheld devices like Personal Digital Assistants and smart cards have made the implementation of cryptosystems a major issue. The Cellular Automata(CA) can be programmed to implement hardware sharing between the encryption and decryption. In this paper, we give conditions for a linear hybrid cellular automata with 60, 102 or 204 to be a linear hybrid group cellular automata C. And we present the conditions which the complemented hybrid group cellular automata C' with complement vectors derived from C has maximum equal lengths in the state transition diagram of C' Also we analyze the relationship among cycles of C' These results generalize Mukhopadhyay's results.

Design of Intra Prediction Circuit for HEVC and H.264 Multi-decoder Supporting UHD Images (UHD 영상을 지원하는 HEVC 및 H.264 멀티 디코더 용 인트라 예측 회로 설계)

  • Yu, Sanghyun;Cho, Kyeongsoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.12
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    • pp.50-56
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    • 2016
  • This paper proposes the architecture and design of intra prediction circuit for a multi-decoder supporting UHD images. The proposed circuit supports not only the latest video compression standard HEVC but also H.264. In addition to the basic function of performing intra prediction, this circuit has the capability of performing the reference sample filter operation defined in the H.264 standard, and the smoothing and strong sample filter operations defined in the HEVC standard. We reduced the circuit size by sharing the circuit blocks for common operations and internal storage, and improved the circuit performance by parallel processing. The proposed circuit was described at RTL using Verilog HDL and its functionality was verified by using NC-Verilog of Cadence. The RTL circuit was synthesized by using Design Compiler of Synopsys and 130nm standard cell library. The synthesized gate-level circuit consists of 69,694 gates and processes 100 ~ 280 frames per second for 4K-UHD HEVC images at the maximum operation frequency of 157MHz.

A New Architecture to Offload Network Traffic using OpenFlow in LTE

  • Venmani, Daniel Philip;Gourhant, Yvon;Zeghlache, Djamal
    • Journal of Korea Society of Industrial Information Systems
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    • v.17 no.1
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    • pp.31-38
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    • 2012
  • Next generation cellular applications and smart phone usage generate very heavy wireless data traffic. It becomes ineluctable for mobile network operators to have multiple core network entities such as Serving Gateway and Packet Data Network Gateway in 4G-LTE to share this high traffic generated. A typical configuration consists of multiple serving gateways behind a load-balancer which would determine which serving gateway would service a end-users'request. Such hardware is expensive, has a rigid policy set, and is a single point of failure. Another perspective of today's increasingly high data traffic is that besides it is being widely accepted that the high bandwidth L TE provides is creating bottlenecks for service providers by the increasing user bandwidth demands without creating any corresponding revenue improvements, a hidden problem that is also passively advancing on the newly emerging 4G-LTE that may need more immediate attention is the network signaling traffic, also known as the control-plane traffic that is generated by the applications developed for smartphones and tablets. With this as starting point, in this paper, we propose a solution, by a new approach considering OpenFlow switch connected to a controller, which gains flexibility in policy, costs less, and has the potential to be more robust to failure with future generations of switches. This also solves the problem of scaling the control-plane traffic that is imperative to preserve revenue and ensure customer satisfaction. Thus, with the proposed architecture with OpenFlow, mobile network operators could manipulate the traffic generated by the control-plane signaling separated from the data-plane, besides also reducing the cost in installing multiple core-network entities.

Design of Hash Processor for SHA-1, HAS-160, and Pseudo-Random Number Generator (SHA-1과 HAS-160과 의사 난수 발생기를 구현한 해쉬 프로세서 설계)

  • Jeon, Shin-Woo;Kim, Nam-Young;Jeong, Yong-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.1C
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    • pp.112-121
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    • 2002
  • In this paper, we present a design of a hash processor for data security systems. Two standard hash algorithms, Sha-1(American) and HAS-1600(Korean), are implemented on a single hash engine to support real time processing of the algorithms. The hash processor can also be used as a PRNG(Pseudo-random number generator) by utilizing SHA-1 hash iterations, which is being used in the Intel software library. Because both SHA-1 and HAS-160 have the same step operation, we could reduce hardware complexity by sharing the computation unit. Due to precomputation of message variables and two-stage pipelined structure, the critical path of the processor was shortened and overall performance was increased. We estimate performance of the hash processor about 624 Mbps for SHA-1 and HAS-160, and 195 Mbps for pseudo-random number generation, both at 100 MHz clock, based on Samsung 0.5um CMOS standard cell library. To our knowledge, this gives the best performance for processing the hash algorithms.

The Base of Understanding for Interdisciplinary Studies on Cyber Crimes - Centering on Regulations in Criminal Law - (사이버범죄의 학제간 연구를 위한 이해의 기초 - 형법상 규제를 중심으로 -)

  • Lim, Byoung-Rak
    • Journal of the Korea Society of Computer and Information
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    • v.13 no.3
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    • pp.237-242
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    • 2008
  • This study aims to provide theoretical base in criminal law for engineers in the viewpoint of jurists to encourage interdisciplinary studies on cyber crimes. Apart from seriousness of discussion on torrent cyber crimes, a good effect of the internet networks such as sharing of information has bee emphasized while the evil influence of its side effect has been neglected. Therefore, this study suggests that we need to consider reinforcement of cyber ethics, and legal mind of IT technicians, strict security by managers, active efforts to develop legitimate contents by managers of web hardware and P2P, and reinforcement of punishments against crimes by internet users. And this study approaches new norms on computer and cyber crimes in interpretational sense of criminal law, and provides the theoretical base of the criminal law focusing on traditional theories, assumptions, and precedents involved in regulations against computer virus distribution.

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Development of Open Land Management Information System(LMIS) Middleware (개방형 토지관리정보체계 미들웨어 개발에 관한 연구)

  • 서창완;백재현;홍성학
    • Spatial Information Research
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    • v.9 no.2
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    • pp.353-368
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    • 2001
  • Recently central and local governments developed a huge spatial database and system using full-scale Geographic Information System (GIS). But Inconsistent spatial data through duplicated database management drops off in efficiency and confidence of administration. It is difficult to share data because of their unique system and data type. Under these circumstances Ministry of Construction and Transportation (MOCT) has been carrying out Land Management Information System (LMIS) to computerize land administration and policy affairs and to implement land database such as law, spatial, attribute data. A prerequisite mission of LMIS is to develop open system for solving the problem of duplicated data management and data sharing and for supporting various computer environments such as hardware, software, network etc. The purpose of LMIS is to reuse the existing investment resources and to expand the existing system resources. Therefore the purpose of this study is to investigate a method of LMIS operation under the existing circumstances and expansion of the system in the future. To do this, Supporting various DBMS, GIS server, Distributing Computing Platform(Unix, NT Server) is needed. Especially LMIS need to be developed as open system with interoperability to get independence of application from various GIS servers.

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Analysis of Time-Based Unauthorized AP Detection Methods According to Hardware Performance of Unauthorized AP (비인증 AP의 하드웨어 성능에 따른 시간 측정 기반의 비인증 AP 탐색 기법의 분석)

  • Jang, Rhong-Ho;Kang, Jeon-Il;Nyang, Dae-Hun;Lee, Kyung-Hee
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.3
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    • pp.551-558
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    • 2015
  • As more people use Wi-Fi and hotspot, unauthorized APs become one of big security problems in modern society. From the beginning of 2010, researchers study about unauthorized AP continually and contributed a lot of methods of detecting unauthorized AP that use wireless resources. Many researches about unauthorized AP detection use time-delay measurement (e.g., average or standard deviation) which is caused by additional wireless connection. In the most previous researches, however, the unauthorized APs consist of laptop and pulg-in Wi-Fi adaptor, and researchers did not concern about time-delay caused by software network sharing. In this paper, we show that existing unauthorized AP detection scheme that can not efficiently classify the high performance unauthorized AP.