• Title/Summary/Keyword: Hardware Security

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Implementation and characterization of flash-based hardware security primitives for cryptographic key generation

  • Mi-Kyung Oh;Sangjae Lee;Yousung Kang;Dooho Choi
    • ETRI Journal
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    • v.45 no.2
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    • pp.346-357
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    • 2023
  • Hardware security primitives, also known as physical unclonable functions (PUFs), perform innovative roles to extract the randomness unique to specific hardware. This paper proposes a novel hardware security primitive using a commercial off-the-shelf flash memory chip that is an intrinsic part of most commercial Internet of Things (IoT) devices. First, we define a hardware security source model to describe a hardware-based fixed random bit generator for use in security applications, such as cryptographic key generation. Then, we propose a hardware security primitive with flash memory by exploiting the variability of tunneling electrons in the floating gate. In accordance with the requirements for robustness against the environment, timing variations, and random errors, we developed an adaptive extraction algorithm for the flash PUF. Experimental results show that the proposed flash PUF successfully generates a fixed random response, where the uniqueness is 49.1%, steadiness is 3.8%, uniformity is 50.2%, and min-entropy per bit is 0.87. Thus, our approach can be applied to security applications with reliability and satisfy high-entropy requirements, such as cryptographic key generation for IoT devices.

Security Analysis of ARM64 Hardware-Based Security (ARM64 아키텍처 기반 하드웨어 보안기술 분석 및 보안성 진단)

  • Myung-Kyu Sim;Hojoon Lee
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.33 no.3
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    • pp.437-447
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    • 2023
  • Memory protection has been researched for decades for program execution protection. ARM recently developed a newhardware security feature to protect memory that was applied to real hardware. However, there are not many hardware withhardware memory protection feature and research has not been actively conducted yet. We perform diagnostics on howandhow it works on real hardware, and on security, with a new hardware memory protection feature, named 'Pointer Authentication Code'. Through this research, it will be possible to find out the direction, use, and security of future hardware security technologies and apply to the program.

A Study of Machine Learning based Hardware Trojans Detection Mechanisms for FPGAs (FPGA의 Hardware Trojan 대응을 위한 기계학습 기반 탐지 기술 연구)

  • Jang, Jaedong;Cho, Mingi;Seo, Yezee;Jeong, Seyeon;Kwon, Taekyoung
    • Journal of Internet Computing and Services
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    • v.21 no.2
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    • pp.109-119
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    • 2020
  • The FPGAs are semiconductors that can be redesigned after initial fabrication. It is used in various embedded systems such as signal processing, automotive industry, defense and military systems. However, as the complexity of hardware design increases and the design and manufacturing process globalizes, there is a growing concern about hardware trojan inserted into hardware. Many detection methods have been proposed to mitigate this threat. However, existing methods are mostly targeted at IC chips, therefore it is difficult to apply to FPGAs that have different components from IC chips, and there are few detection studies targeting FPGA chips. In this paper, we propose a method to detect hardware trojan by learning the static features of hardware trojan in LUT-level netlist of FPGA using machine learning.

Smart grid and nuclear power plant security by integrating cryptographic hardware chip

  • Kumar, Niraj;Mishra, Vishnu Mohan;Kumar, Adesh
    • Nuclear Engineering and Technology
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    • v.53 no.10
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    • pp.3327-3334
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    • 2021
  • Present electric grids are advanced to integrate smart grids, distributed resources, high-speed sensing and control, and other advanced metering technologies. Cybersecurity is one of the challenges of the smart grid and nuclear plant digital system. It affects the advanced metering infrastructure (AMI), for grid data communication and controls the information in real-time. The research article is emphasized solving the nuclear and smart grid hardware security issues with the integration of field programmable gate array (FPGA), and implementing the latest Time Authenticated Cryptographic Identity Transmission (TACIT) cryptographic algorithm in the chip. The cryptographic-based encryption and decryption approach can be used for a smart grid distribution system embedding with FPGA hardware. The chip design is carried in Xilinx ISE 14.7 and synthesized on Virtex-5 FPGA hardware. The state of the art of work is that the algorithm is implemented on FPGA hardware that provides the scalable design with different key sizes, and its integration enhances the grid hardware security and switching. It has been reported by similar state-of-the-art approaches, that the algorithm was limited in software, not implemented in a hardware chip. The main finding of the research work is that the design predicts the utilization of hardware parameters such as slices, LUTs, flip-flops, memory, input/output blocks, and timing information for Virtex-5 FPGA synthesis before the chip fabrication. The information is extracted for 8-bit to 128-bit key and grid data with initial parameters. TACIT security chip supports 400 MHz frequency for 128-bit key. The research work is an effort to provide the solution for the industries working towards embedded hardware security for the smart grid, power plants, and nuclear applications.

A Design of an AES-based Security Chip for IoT Applications using Verilog HDL (IoT 애플리케이션을 위한 AES 기반 보안 칩 설계)

  • Park, Hyeon-Keun;Lee, Kwangjae
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.67 no.1
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    • pp.9-14
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    • 2018
  • In this paper, we introduce an AES-based security chip for the embedded system of Internet of Things(IoT). We used Verilog HDL to implement the AES algorithm in FPGA. The designed AES module creates 128-bit cipher by encrypting 128-bit plain text and vice versa. RTL simulations are performed to verify the AES function and the theory is compared to the results. An FPGA emulation was also performed with 40 types of test sequences using two Altera DE0-Nano-SoC boards. To evaluate the performance of security algorithms, we compared them with AES implemented by software. The processing cycle per data unit of hardware implementation is 3.9 to 7.7 times faster than software implementation. However, there is a possibility that the processing speed grow slower due to the feature of the hardware design. This can be solved by using a pipelined scheme that divides the propagation delay time or by using an ASIC design method. In addition to the AES algorithm designed in this paper, various algorithms such as IPSec can be implemented in hardware. If hardware IP design is set in advance, future IoT applications will be able to improve security strength without time difficulties.

Design of Hardware(Hacker Board) for IoT Security Education Utilizing Dual MCUs (이중 MCU를 활용한 IoT 보안 교육용 하드웨어(해커보드) 설계)

  • Dong-Won Kim
    • Convergence Security Journal
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    • v.24 no.1
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    • pp.43-49
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    • 2024
  • The convergence of education and technology has been emphasized, leading to the application of educational technology (EdTech) in the field of education. EdTech provides learner-centered, customized learning environments through various media and learning situations. In this paper, we designed hardware for EdTech-based educational tools for IoT security education in the field of cybersecurity education. The hardware is based on a dual microcontroller unit (MCU) within a single board, allowing for both attack and defense to be performed. To leverage various sensors in the Internet of Things (IoT), the hardware is modularly designed. From an educational perspective, utilizing EdTech in cybersecurity education enhances engagement by incorporating tangible physical teaching aids. The proposed research suggests that the design of IoT security education hardware can serve as a reference for simplifying the creation of a security education environment for embedded hardware, software, sensor networks, and other areas that are challenging to address in traditional education..

Security Core Technology Implementation for Hardware-based Smart Devices (HW기반 스마트 단말 보안 핵심기술 구현)

  • Kim, Jeong Nyeo
    • Journal of Digital Convergence
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    • v.14 no.11
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    • pp.501-505
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    • 2016
  • Recently, the frequency of dealing important information regarding financial services like paying through smart device or internet banking on smart device has been increasing. Also, with the development of smart device execution environment towards open software environment, it became easier for users to download and use random application software, and its security aspect appears to be weakening. This study inspects features of hardware-based smart device security technology. Furthermore, this study proposes a realization method in MTM hardware-based secure smart device execution environment for an application software that runs in smart devices. While existing MTM provides the root of trust function only for the mobile device, the MTM-based mobile security environment technology proposed in this paper can provide numerous security functions that application program needs in mobile device. The further researches on IoT devices that are compatible with security hardware, gateway security technology and methods that secure reliability and security applicable to varied IoT devices by advancing security hardware are the next plan to proceed.

The Security Establishment for Cloud Computing through CASE Study

  • Choi, Myeonggil
    • Journal of Information Technology Applications and Management
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    • v.27 no.6
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    • pp.89-99
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    • 2020
  • Cloud computing is rapidly increasing for achieving comfortable computing. Cloud computing has essentially security vulnerability of software and hardware. For achieving secure cloud computing, the vulnerabilities of cloud computing could be analyzed in a various and systematic approach from perspective of the service designer, service operator, the designer of cloud security and certifiers of cloud systems. The paper investigates the vulnerabilities and security controls from the perspective of administration, and systems. For achieving the secure operation of cloud computing, this paper analyzes technological security vulnerability, operational weakness and the security issues in an enterprise. Based on analysis, the paper suggests secure establishments for cloud computing.

Digital Evidence Collection Procedure for Hardware Unique Information Collection (하드웨어 고유 정보 수집에 대한 디지털 증거 수집 절차)

  • Pak, Chan-ung;Lee, Sang-jin
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.28 no.4
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    • pp.839-845
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    • 2018
  • Sensitive data is encrypted and stored as privacy policy is strengthened through frequent leakage of personal information. For this reason, the cryptographically owned encrypted data is a very important analysis from the viewpoint of digital forensics. Until now, the digital evidence collection procedure only considers imaging, so hardware specific information is not collected. If the encryption key is generated by information that is not left in the disk image, the encrypted data can not be decrypted. Recently, an application for performing encryption using hardware specific information has appeared. Therefore, in this paper, hardware specific information which does not remain in file form in auxiliary storage device is studied, and hardware specific information collection method is introduced.

Concealed Modular Hardware Keylogger Detection Methods (은닉된 모듈식 하드웨어 키로거 탐지 방안)

  • Park, Jae-kon;Kang, Sung-moon;Goh, Sung-cheol
    • Convergence Security Journal
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    • v.18 no.4
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    • pp.11-17
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    • 2018
  • Hardware Keyloggers are available in a variety of modular keylogger products with small size and Wi-Fi communication capabilities that can be concealed inside the keyboard. Such keyloggers are more likely to leak important information and sensitive information from government, military, business and individuals because they are difficult to detect if they are used by a third party for malicious purposes. However, unlike software keyloggers, research on security solutions and detection methods are relatively small in number. This paper, we investigate security vulnerability caused by hardware keylogger and existing detection methods, and improve the detection possibility of modular hardware keylogger through non-destructive measurement methods, such as power consumption of keyboard, infrared temperature, and X-ray. Furthenmore, We propose a method that can be done with experimental results.

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