• Title/Summary/Keyword: Hardware Resources

Search Result 442, Processing Time 0.025 seconds

Collaborative Streamlined On-Chip Software Architecture on Heterogenous Multi-Cores for Low-Power Reactive Control in Automotive Embedded Processors (차량용 임베디드 프로세서에서 저전력 반응적 제어를 위한 이기종 멀티코어 협력적 스트리밍 온-칩 소프트웨어 구조)

  • Jisu, Kwon;Daejin, Park
    • IEMEK Journal of Embedded Systems and Applications
    • /
    • v.17 no.6
    • /
    • pp.375-382
    • /
    • 2022
  • This paper proposes a multi-core cooperative computing structure considering the heterogeneous features of automotive embedded on-chip software. The automotive embedded software has the heterogeneous execution flow properties for various hardware drives. Software developed with a homogeneous execution flow without considering these properties will incur inefficient overhead due to core latency and load. The proposed method was evaluated on an target board on which a automotive MCU (micro-controller unit) with built-in multi-cores was mounted. We demonstrate an overhead reduction when software including common embedded system tasks, such as ADC sampling, DSP operations, and communication interfaces, are implemented in a heterogeneous execution flow. When we used the proposed method, embedded software was able to take advantage of idle states that occur between heterogeneous tasks to make efficient use of the resources on the board. As a result of the experiments, the power consumption of the board decreased by 42.11% compared to the baseline. Furthermore, the time required to process the same amount of sampling data was reduced by 27.09%. Experimental results validate the efficiency of the proposed multi-core cooperative heterogeneous embedded software execution technique.

Research on security technology to respond to edge router-based network attacks (Edge 라우터 기반 네트워크 공격에 대응하는 보안기술 연구)

  • Hwang, Seong-Kyu
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.26 no.9
    • /
    • pp.1374-1381
    • /
    • 2022
  • Existing research on security technology related to network attack response has focused on research using hardware network security technology, network attacks that wiretap and wiretap network packets, denial of service attack that consumes server resources to bring down the system, and network by identifying vulnerabilities before attack. It is classified as a scanning attack. In addition, methods for increasing network security, antivirus vaccines and antivirus systems have been mainly proposed and designed. In particular, many users do not fully utilize the security function of the router. In order to overcome this problem, it is classified according to the network security level to block external attacks through layered security management through layer-by-layer experiments. The scope of the study was presented by examining the security technology trends of edge routers, and suggested methods and implementation examples to protect from threats related to edge router-based network attacks.

A Study on the Shift Register-Based Multi Channel Ultrasonic Focusing Delay Control Method using a CPLD for Ultrasonic Tactile Implementation (초음파 촉각 구현을 위한 CPLD를 사용한 Shift Register기반 다채널 초음파 집속 지연 제어 방법에 대한 연구)

  • Shin, Duck-Shick;Park, Jun-Heon;Lim, Young-Cheol;Choi, Joon-Ho
    • Journal of Sensor Science and Technology
    • /
    • v.31 no.5
    • /
    • pp.324-329
    • /
    • 2022
  • This paper proposes a shift-register-based multichannel ultrasonic focusing delay control method using a complex programmable logic device (CPLD) for a high resolution of ultrasonic focusing system. The proposed method can achieve the ultrasonic focusing through the delay control of driving signals of each ultrasonic transducer of an ultrasonic array. The delay of the driving signals of all ultrasonic channels can be controlled by setting the shift register in the CPLD. The experiment verified that the frequency of the clock used for the delay control increased, the error of the focusing point decreased, and the diameter of the focusing point decreased as the length of the shift register in the proposed method. The proposed method used only one CPLD for ultrasonic focusing and did not require to use complex hardware circuits. Therefore, the resources required for the design of an ultrasonic focusing system could be reduced. The proposed method can be applied to the fields of human computer interaction (HCI), virtual reality (VR) and augmented reality (AR).

Design of ADC for Dual-loop Digital LDO Regulator (이중 루프 Digital LDO Regulator 용 ADC 설계)

  • Sang-Soon Park;Jeong-Hee Jeon;Jae-Hyeong Lee;Joong-Ho Choi
    • Journal of IKEEE
    • /
    • v.27 no.3
    • /
    • pp.333-339
    • /
    • 2023
  • The global market for wearable devices is growing, driving demand for efficient PMICs. Wearable PMICs must be highly energy-efficient despite limited hardware resources. Advancements in process technology enable low-power consumption, but traditional analog LDO regulators face challenges with reduced power supply voltage. In this paper, a novel ADC design with a 3-bit continuous-time flash ADC for the coarse loop and a 5-bit discrete-time SAR ADC for the fine loop is proposed for digital LDO, achieving a 34.78 dB SNR and 5.39 bits ENOB in a 55-nm CMOS technology.

Migration and Energy Aware Network Traffic Prediction Method Based on LSTM in NFV Environment

  • Ying Hu;Liang Zhu;Jianwei Zhang;Zengyu Cai;Jihui Han
    • KSII Transactions on Internet and Information Systems (TIIS)
    • /
    • v.17 no.3
    • /
    • pp.896-915
    • /
    • 2023
  • The network function virtualization (NFV) uses virtualization technology to separate software from hardware. One of the most important challenges of NFV is the resource management of virtual network functions (VNFs). According to the dynamic nature of NFV, the resource allocation of VNFs must be changed to adapt to the variations of incoming network traffic. However, the significant delay may be happened because of the reallocation of resources. In order to balance the performance between delay and quality of service, this paper firstly made a compromise between VNF migration and energy consumption. Then, the long short-term memory (LSTM) was utilized to forecast network traffic. Also, the asymmetric loss function for LSTM (LO-LSTM) was proposed to increase the predicted value to a certain extent. Finally, an experiment was conducted to evaluate the performance of LO-LSTM. The results demonstrated that the proposed LO-LSTM can not only reduce migration times, but also make the energy consumption increment within an acceptable range.

Application of Internet of Things Based Monitoring System for indoor Ganoderma Lucidum Cultivation

  • Quoc Cuong Nguyen;Hoang Tan Huynh;Tuong So Dao;HyukDong Kwon
    • International journal of advanced smart convergence
    • /
    • v.12 no.2
    • /
    • pp.153-158
    • /
    • 2023
  • Most agriculture plantings are based on traditional farming and demand a lot of human work processes. In order to improve the efficiency as well as the productivity of their farms, modern agricultural technology was proven to be better than traditional practices. Internet of Things (IoT) is usually related in modern agriculture which provides the farmer with a real-time monitoring condition of their farm from anywhere and anytime. Therefore, the application of IoT with a sensor to measure and monitors the humidity and the temperature in the mushroom farm that can overcome this problem. This paper proposes an IoT based monitoring system forindoor Ganoderma lucidum cultivation at a minimal cost in terms of hardware resources and practicality. The results show that the data of temperature and humidity are changing depending on the weather and the preliminary experimental results demonstrated that all parameters of the system were optimized and successful to achieve the objective. In addition, the analysis results show that the quality of Ganoderma lucidum produced on the research method conforms to regulations in Vietnam.

Computer Architecture Execution Time Optimization Using Swarm in Machine Learning

  • Sarah AlBarakati;Sally AlQarni;Rehab K. Qarout;Kaouther Laabidi
    • International Journal of Computer Science & Network Security
    • /
    • v.23 no.10
    • /
    • pp.49-56
    • /
    • 2023
  • Computer architecture serves as a link between application requirements and underlying technology capabilities such as technical, mathematical, medical, and business applications' computational and storage demands are constantly increasing. Machine learning these days grown and used in many fields and it performed better than traditional computing in applications that need to be implemented by using mathematical algorithms. A mathematical algorithm requires more extensive and quicker calculations, higher computer architecture specification, and takes longer execution time. Therefore, there is a need to improve the use of computer hardware such as CPU, memory, etc. optimization has a main role to reduce the execution time and improve the utilization of computer recourses. And for the importance of execution time in implementing machine learning supervised module linear regression, in this paper we focus on optimizing machine learning algorithms, for this purpose we write a (Diabetes prediction program) and applying on it a Practical Swarm Optimization (PSO) to reduce the execution time and improve the utilization of computer resources. Finally, a massive improvement in execution time were observed.

Bitcoin Cryptocurrency: Its Cryptographic Weaknesses and Remedies

  • Anindya Kumar Biswas;Mou Dasgupta
    • Asia pacific journal of information systems
    • /
    • v.30 no.1
    • /
    • pp.21-30
    • /
    • 2020
  • Bitcoin (BTC) is a type of cryptocurrency that supports transaction/payment of virtual money between BTC users without the presence of a central authority or any third party like bank. It uses some cryptographic techniques namely public- and private-keys, digital signature and cryptographic-hash functions, and they are used for making secure transactions and maintaining distributed public ledger called blockchain. In BTC system, each transaction signed by sender is broadcasted over the P2P (Peer-to-Peer) Bitcoin network and a set of such transactions collected over a period is hashed together with the previous block/other values to form a block known as candidate block, where the first block known as genesis-block was created independently. Before a candidate block to be the part of existing blockchain (chaining of blocks), a computation-intensive hard problem needs to be solved. A number of miners try to solve it and a winner earns some BTCs as inspiration. The miners have high computing and hardware resources, and they play key roles in BTC for blockchain formation. This paper mainly analyses the underlying cryptographic techniques, identifies some weaknesses and proposes their enhancements. For these, two modifications of BTC are suggested ― (i) All BTC users must use digital certificates for their authentication and (ii) Winning miner must give signature on the compressed data of a block for authentication of public blocks/blockchain.

A Study on Machine Learning Compiler and Modulo Scheduler (머신러닝 컴파일러와 모듈로 스케쥴러에 관한 연구)

  • Doosan Cho
    • Journal of the Korean Society of Industry Convergence
    • /
    • v.27 no.1
    • /
    • pp.87-95
    • /
    • 2024
  • This study is on modulo scheduling algorithms for multicore processor in machine learning applications. Machine learning algorithms are designed to perform a large amount of operations such as vectors and matrices in order to quickly process large amounts of data stream. To support such large amounts of computations, processor architectures to support applications such as artificial intelligence, neural networks, and machine learning are designed in the form of parallel processing such as multicore. To effectively utilize these multi-core hardware resources, various compiler techniques are being used and studied. In this study, among these compiler techniques, we analyzed the modular scheduler, which is especially important in one core's computation pipeline. This paper looked at and compared the iterative modular scheduler and the swing modular scheduler, which are the most widely used and studied. As a result, both schedulers provided similar performance results, and when measuring register pressure as an indicator, it was confirmed that the swing modulo scheduler provided slightly better performance. In this study, a technique that divides recurrence edge is proposed to improve the minimum initiation interval of the modulo schedulers.

Development of Grid-Based Conceptual Hydrologic Model (격자기반의 개념적 수문모형의 개발)

  • Kim, Byung-Sik;Yoon, Seon-Kyoo;Yang, Dong-Min;Kwon, Hyun-Han
    • Journal of Korea Water Resources Association
    • /
    • v.43 no.7
    • /
    • pp.667-679
    • /
    • 2010
  • The distributed hydrologic model has been considerably improved due to rapid development of computer hardware technology as well as the increased accessibility and the applicability of hydro-geologic information using GIS. It has been acknowledged that physically-based distributed hydrologic model require significant amounts of data for their calibration, so its application at ungauged catchments is very limited. In this regard, this study was intended to develop a distributed hydrologic model (S-RAT) that is mainly based on conceptually grid-based water balance model. The proposed model shows advantages as a new distributed rainfall-runoff model in terms of their simplicity and model performance. Another advantage of the proposed model is to effectively assess spatio-temporal variation for the entire runoff process. In addition, S-RAT does not rely on any commercial GIS pre-processing tools because a built-in GIS pre-processing module was developed and included in the model. Through the application to the two pilot basins, it was found that S-RAT model has temporal and spatial transferability of parameters and also S-RAT model can be effectively used as a radar data-driven rainfall-runoff model.