• Title/Summary/Keyword: Hardware + Software

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Review on the Software-Defined Anything Market Eco-System (SDx 산업 생태계 동향)

  • Min, D.H.;Ahn, J.Y.
    • Electronics and Telecommunications Trends
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    • v.33 no.2
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    • pp.10-21
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    • 2018
  • Software defined technology (SDx), which defines the IT infrastructure based on software and controls that are not dependent on a specific hardware, and provides a rapid and flexible IT infrastructure, is increasing. SDx features centralized control, a common commercial product infrastructure, hardware-software dualization, and programmability. With the advent of the fourth industrial revolution, in which various application services are emerging based on IT infrastructure, interest in SDx is gradually increasing as the need for infrastructure flexibility and an agile business environment is increasing. This paper reviews the market trends of software defined anything using SDx and the trends of major vendors.

Design and Implementation of a Hybrid TCP/IP Offload Engine Prototype (Hybrid TCP/IP Offload Engine 프로토타입의 설계 및 구현)

  • Jang Han-Kook;Chung Sang-Hwa;Oh Soo-Cheol
    • Journal of KIISE:Computer Systems and Theory
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    • v.33 no.5
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    • pp.257-266
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    • 2006
  • Recently TCP/IP Offload Engine (TOE) technology, which processes TCP/IP on a network adapter instead of the host CPU, has become an important approach to reduce TCP/IP processing overhead in the host CPU. There have been two approaches to implementing TOE: software TOE, in which TCP/IP is processed by an embedded processor on a network adapter; and hardware TOE, in which all TCP/IP functions are implemented by hardware. This paper proposes a hybrid TOE that combines software and hardware functions in the TOE. In the hybrid TOE, functions that cannot have guaranteed performance on an embedded processor because of heavy load are implemented by hardware. Other functions that do not impose as much load are implemented by software on embedded processors. The hybrid TOE guarantees network performance near that of hardware TOE and it has the advantage of flexibility, because it is easy to add new functions or offload upper-level protocols of TCP/IP. In this paper, we developed a prototype board with an FPGA and an ARM processor to implement a hybrid TOE prototype. We implemented the hardware modules on the FPGA and the software modules on the ARM processor. We also developed a coprocessing mechanism between the hardware and software modules. Experimental results proved that the hybrid TOE prototype can greatly reduce the load on a host CPU and we analyzed the effects of the coprocessing mechanism. Finally, we analyzed important features that are required to implement a complete hybrid TOE and we predict its performance.

A Study on Implementation of Real-Time Multiprocess Trace Stream Decoder (실시간 다중 프로세스 트레이스 스트림 디코더 구현에 관한 연구)

  • Kim, Hyuncheol;Kim, Youngsoo;Kim, Jonghyun
    • Convergence Security Journal
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    • v.18 no.5_1
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    • pp.67-73
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    • 2018
  • From a software engineering point of view, tracing is a special form of logging that records program execution information. Tracers using dedicated hardware are often used because of the characteristics of tracers that need to generate and decode huge amounts of data in real time. Intel(R) PT uses proprietary hardware to record all information about software execution on each hardware thread. When the software execution is completed, the PT can process the trace data of the software and reconstruct the correct program flow. The hardware trace program can be integrated into the operating system, but in the case of the window system, the integration is not tight due to problems such as the kernel opening. Also, it is possible to trace only a single process and not provide a way to trace multiple process streams. In this paper, we propose a method to extend existing PT trace program to support multi - process stream traceability in Windows environment in order to overcome these disadvantages.

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Virtual Prototyping of Area-Based Fast Image Stitching Algorithm

  • Mudragada, Lakshmi Kalyani;Lee, Kye-Shin;Kim, Byung-Gyu
    • Journal of Multimedia Information System
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    • v.6 no.1
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    • pp.7-14
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    • 2019
  • This work presents a virtual prototyping design approach for an area-based image stitching hardware. The virtual hardware obtained from virtual prototyping is equivalent to the conceptual algorithm, yet the conceptual blocks are linked to the actual circuit components including the memory, logic gates, and arithmetic units. Through the proposed method, the overall structure, size, and computation speed of the actual hardware can be estimated in the early design stage. As a result, the optimized virtual hardware facilitates the hardware implementation by eliminating trail design and redundant simulation steps to optimize the hardware performance. In order to verify the feasibility of the proposed method, the virtual hardware of an image stitching platform has been realized, where it required 10,522,368 clock cycles to stitch two $1280{\times}1024$ sized images. Furthermore, with a clock frequency of 250MHz, the estimated computation time of the proposed virtual hardware is 0.877sec, which is 10x faster than the software-based image stitch platform using MATLAB.

Qualitative study of software ILS application: Comparison analysis of maintenance types in software and hardware (소프트웨어 ILS 적용방안 연구 : 소프트웨어와 하드웨어의 유지보수 특성을 고려한 비교 분석을 중심으로)

  • Lee, Kwan-Young;Kim, Sang-Moon;Park, Eun-Shim;Park, Jae-Eun;Kim, Geun-Hyung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.9
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    • pp.5726-5737
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    • 2014
  • The increasing importance of software has highlighted the need for the proper application of software ILS. On the other hand, the development of ILS has been somewhat limited to the area of hardware development. Therefore, this study examined the potential difficulties in applying software ILS to practical uses, and analyzed the drawbacks by reporting several domestic or foreign regulation cases. In addition, the differences between hardware and software ILS were examined by considering their characteristics of maintenance. Eventually, by establishing the proper range, this study proposes a development plan that is suitable for domestic weapon systems. The proposed research is expected to be helpful for offering specific plans for designing software ILS.

A Reserach on the VLSI Machine Design for Regression Analysis (회귀분석용 VLSI 머신 설계에 관한 연구)

  • ;武藤佳恭, 相機秀夫
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.20 no.2
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    • pp.7-15
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    • 1983
  • In recent years, the logic circuits of high function have been developed to VLSI by the radical advancement of semi-conductor technologies. Under the above influence, it has become possible to design the special VLSI chips for high speed of numerical value processing, wide-band, image processing, etc. And, the development of the VLSI from various kinds of software package has become quite possible. This paper is to propose the technical skill of hardware design about general software package (BMD). The decrease of speed of former statistics processing caused by depending on software only is improved by hardware. In regard of design algorithm, the main system will be able to be established by considering of special feature of statistics. As a result, the complexity of software package is excluded by hardware. And, the efficiency is improved by high speed processing.

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The Development of C&DH subsystem in the D-SAT System

  • Zenaida Awalludin Sitti;Mat Yusoff Norhan
    • Proceedings of the KSRS Conference
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    • 2004.10a
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    • pp.39-41
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    • 2004
  • This paper demonstrates the in-house development of the subsystem C&DH in a D-SAT satellite project of Astronautic Technology (M) Sdn. Bhd. (ATSB). D-SAT is a non-imaging satellite. It will carry a dosimeter as the payload for scientific objectives. Since one of the D-SAT project establishment intended objectives is to demonstrate the research and development skill of the ATSB engineers on the satellite system building, most of the subsystems of the D-SAT are developed in-house including the C&DH subsystem. C&DH subsystem plays an important role for managing data handling tasks and general operation of the satellite system. The C&DH development includes the research and study on the hardware and software design, the design of both the hardware and software, the development of the software system, the integration between the software and the hardware system and the implementation of the subsystem into the satellite system. This program allows ATSB to accomplish the engineers with expertise not only in the C&DH subsystem but other subsystems too besides developing knowledge in the management of a space project that covers not only on the technical issues but issues relating to the economic, political and legal issues.

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Hardware and Software Dependability Analysis of Embedded AVTMR(All Voting Triple Modular Redundancy) System (내장형 AVTMR 시스템의 하드웨어 및 소프트웨어 신뢰성 분석)

  • Kim, Hyun-Ki
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.7B
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    • pp.744-750
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    • 2009
  • In this paper, the unified Markov modeling of hardware and software for AVTMR(AlI Voting Triple Modular Redundancy) system is proposed and the dependability is analyzed. In hardware case, a failure rate is fixed to no time varying parameter. But, in software case, failure rate is applied with time varying parameter. Especially, the dependability(Reliability, Availability, Maintainability, Safety) of software is analyzed with G-O/NHPP for Markov modeling. The dependability of single and AVTMR system is analyzed and simulated with a unified Markov modeling method, and the characteristic of each system is compared accroding to failure rate. This kind of fault tolerat system can be applied to an airplane and life critical system to meet the requirement for a specific requirement.

Design and Implementation of MDDI Protocol for Mobile System (모바일 시스템을 위한 MDDI 프로토콜 설계 및 구현)

  • Kim, Jong-Moon;Lee, Byung-Kwon;Jung, Hoe-Kyung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.5
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    • pp.1089-1094
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    • 2013
  • In this study, we propose how th implement a MDDI(Mobile Display Digital Interface) protocol packet generation method in software. MDDI protocol is widely used in mobile display device. MDDI protocol packets are generated by software within micro processor. This method needs the minimum hardware configuration. In order to implementation of this method, we design a hardware platform with a high performance microprocessor and a FPGA. The packets generated by software within microprocessor are converted into LVDS signals, and transmitted by hardware within FPGA. This study suggests the benefits of the way how software can easily create a variety of packet. But, this proposed method takes more time in packet transmission compared to the traditional method. This weakness remains as a future challenge, which can be soon improved.

Distributed control system architecture for deep submergence rescue vehicles

  • Sun, Yushan;Ran, Xiangrui;Zhang, Guocheng;Wu, Fanyu;Du, Chengrong
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.11 no.1
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    • pp.274-284
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    • 2019
  • The control architectures of Chuan Suo (CS) deep submergence rescue vehicle are introduced. The hardware and software architectures are also discussed. The hardware part adopts a distributed control system composed of surface and underwater nodes. A computer is used as a surface control machine. Underwater equipment is based on a multi-board-embedded industrial computer with PC104 BUS, which contains IO, A/D, D/A, eight-channel serial, and power boards. The hardware and software parts complete data transmission through optical fibers. The software part involves an IPC of embedded Vxworks real-time operating system, upon which the operation of I/O, A/D, and D/A boards and serial ports is based on; this setup improves the real-time manipulation. The information flow is controlled by the software part, and the thrust distribution is introduced. A submergence vehicle heeling control method based on ballast water tank regulation is introduced to meet the special heeling requirements of the submergence rescue vehicle during docking. Finally, the feasibility and reliability of the entire system are verified by a pool test.