• Title/Summary/Keyword: Hard Real-time Systems

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Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems Using Efficient Slack Time Analysis (효율적인 슬랙 분석 방법에 기반한 경성 실시간 시스템에서의 동적 전압 조절 방안)

  • 김운석;김지홍;민상렬
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.12
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    • pp.736-748
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    • 2003
  • Dynamic voltage scaling(DVS), which adjusts the clock speed and supply voltage dynamically, is an effective technique in reducing the energy consumption of embedded real-time systems. The energy efficiency of a DVS algorithm largely depends on the performance of the slack estimation method used in it. In this paper, we propose novel DVS algorithms for periodic hard real-time tasks based on an improved slack estimation algorithm. Unlike the existing techniques, the proposed method can be applied to most priority-driven scheduling policies. Especially, we apply the proposed slack estimation method to EDF and RM scheduling policies. The experimental results show that the DVS algorithms using the proposed slack estimation method reduce the energy consumption by 20∼40 % over the existing DVS algorithms.

Two-Level Scratchpad Memory Architectures to Achieve Time Predictability and High Performance

  • Liu, Yu;Zhang, Wei
    • Journal of Computing Science and Engineering
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    • v.8 no.4
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    • pp.215-227
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    • 2014
  • In modern computer architectures, caches are widely used to shorten the gap between processor speed and memory access time. However, caches are time-unpredictable, and thus can significantly increase the complexity of worst-case execution time (WCET) analysis, which is crucial for real-time systems. This paper proposes a time-predictable two-level scratchpad-based architecture and an ILP-based static memory objects assignment algorithm to support real-time computing. Moreover, to exploit the load/store latencies that are known statically in this architecture, we study a Scratch-pad Sensitive Scheduling method to further improve the performance. Our experimental results indicate that the performance and energy consumption of the two-level scratchpad-based architecture are superior to the similar cache based architecture for most of the benchmarks we studied.

Real-time Scheduling for (m,k)-firm Deadline Tasks on Energy-constrained Multiprocessors (한정된 전력량을 가진 멀티프로세서 시스템에서 (m,k)-firm 데드라인 태스크를 위한 실시간 스케줄링 기법)

  • Kong, Yeonhwa;Cho, Hyeonjoong
    • KIPS Transactions on Computer and Communication Systems
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    • v.2 no.6
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    • pp.237-244
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    • 2013
  • We propose Energy-constrained Multiprocessor Real-Time Scheduling algorithms for (m,k)-firm deadline constrained tasks (EMRTS-MK). Rather than simply saving as much energy as possible, we consider energy as hard constraint under which the system remains functional and delivers an acceptable performance at least during the prescribed mission time. We evaluate EMRTS-MKs in several experiments, which quantitatively show that they achieve the scheduling objectives.

Practical and Verifiable C++ Dynamic Cast for Hard Real-Time Systems

  • Dechev, Damian;Mahapatra, Rabi;Stroustrup, Bjarne
    • Journal of Computing Science and Engineering
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    • v.2 no.4
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    • pp.375-393
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    • 2008
  • The dynamic cast operation allows flexibility in the design and use of data management facilities in object-oriented programs. Dynamic cast has an important role in the implementation of the Data Management Services (DMS) of the Mission Data System Project (MDS), the Jet Propulsion Laboratory's experimental work for providing a state-based and goal-oriented unified architecture for testing and development of mission software. DMS is responsible for the storage and transport of control and scientific data in a remote autonomous spacecraft. Like similar operators in other languages, the C++ dynamic cast operator does not provide the timing guarantees needed for hard real-time embedded systems. In a recent study, Gibbs and Stroustrup (G&S) devised a dynamic cast implementation strategy that guarantees fast constant-time performance. This paper presents the definition and application of a cosimulation framework to formally verify and evaluate the G&S fast dynamic casting scheme and its applicability in the Mission Data System DMS application. We describe the systematic process of model-based simulation and analysis that has led to performance improvement of the G&S algorithm's heuristics by about a factor of 2. In this work we introduce and apply a library for extracting semantic information from C++ source code that helps us deliver a practical and verifiable implementation of the fast dynamic casting algorithm.

Embedded Real-Time Software Architecture for Unmanned Autonomous Helicopters

  • Hong, Won-Eui;Lee, Jae-Shin;Rai, Laxmisha;Kang, Soon-Ju
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.4
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    • pp.243-248
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    • 2005
  • The UAV (Unmanned Aerial Vehicle) systems like unmanned autonomous helicopters are used in various missions of flight navigation and used to collect the environmental information of the surroundings. To realize the full functionalities of the UAV, the software part becomes a challenging problem. In this paper embedded real-time software architecture for unmanned autonomous helicopter is proposed that guarantee real-time performance of hard-real time tasks and re-configurability of soft-real time and non-real time tasks. The proposed software architecture has four layers: hardware, execution, service agent and remote user interface layer according to the reactiveness level for external events. In addition, the layered separation of concurrent tasks makes different kinds of mission reconfiguration possible in the system. An Unmanned autonomous helicopter system was implemented (Kyosho RC Helicopter) in our lab to test and evaluate the performance of the proposed system.

HILS of the Braking System of a High Speed Train (고속전철 제동시스템의 HILS)

  • Hwang, Won-Ju;Kang, Chul-Goo
    • Journal of Institute of Control, Robotics and Systems
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    • v.7 no.5
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    • pp.432-437
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    • 2001
  • Korea High Speed Train(KHST) is supposed to run up 350km/h, in which the braking system has a crucial role for the safety of the train. In the design st데 of the braking system, its very hard to ac-quire information data for design guidelines. A HILS(Hardware-In-the-Loop Simulation) system can be used to get design data which could simulate the braking system of the real train in real-time. In this paper, cars are modelled including car dynamics, brake blending algorithms, pneumatic actuator dynamics, the models of each braking devices, adhesive coefficients, and soon. Real-time braking time, distance, and other design parameters are simulated using a DSP board and C language which shows the validity of the proposed method.

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Modeling of Discrete Event Systems with Real-time Temporal Logic Frameworks (실시간 시간논리구조를 이용한 이산 사건 시스템의 모델링)

  • Jeong, Yong-Man;Lee, Won-Hyok;Choi, Jeong-Nae;Hwang, Hyung-Soo
    • Proceedings of the KIEE Conference
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    • 1997.07b
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    • pp.590-592
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    • 1997
  • A Discrete Event Dynamic System is a system whose states change in response to the occurrence of events from a predefined event set. A major difficulty in developing analytical results for the systems is the lack of appropriate modeling techniques. This paper proposes the use of Real-time Temporal Logic as a modeling tool for the analysis and control of DEDS. The Real-time Temporal Logic Frameworks is extended with a suitable structure of modeling hard real-time constraints. Modeling rules are developed for several specific situations. It is shown how the graphical model can be translated to a system of linear equations and constraints.

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A Dynamic Voltage Scaling Algorithm for Low-Energy Hard Real-Time Applications using Execution Time Profile (실행 시간 프로파일을 이용한 저전력 경성 실시간 프로그램용 동적 전압 조절 알고리즘)

  • 신동군;김지홍
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.11
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    • pp.601-610
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    • 2002
  • Intra-task voltage scheduling (IntraVS), which adjusts the supply voltage within an individual task boundary, is an effective technique for developing low-power applications. In this paper, we propose a novel intra-task voltage scheduling algorithm for hard real-time applications based on average-case execution time. Unlike the conventional IntraVS algorithm where voltage scaling decisions are based on the worst-case execution cycles, tile proposed algorithm improves the energy efficiency by controlling the execution speed based on average-case execution cycles while meeting the real-time constraints. The experimental results using an MPEG-4 decoder program show that the proposed algorithm reduces the energy consumption by up to 34% over conventional IntraVS algorithm.

Development of a Heuristic Algorithm Based on Simulated Annealing for Time-Resource Tradeoffs in Project Scheduling Problems (시간-자원 트레이드오프 프로젝트 스케줄링 문제 해결을 위한 시뮬레이티드 어닐링 기반 휴리스틱 알고리즘 개발)

  • Kim, Geon-A;Seo, Yoon-Ho
    • The Journal of Information Systems
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    • v.28 no.4
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    • pp.175-197
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    • 2019
  • Purpose This study develops a heuristic algorithm to solve the time-resource tradeoffs in project scheduling problems with a real basis. Design/methodology/approach Resource constrained project scheduling problem with time-resource tradeoff is well-known as one of the NP-hard problems. Previous researchers have proposed heuristic that minimize Makespan of project scheduling by deriving optimal combinations from finite combinations of time and resource. We studied to solve project scheduling problems by deriving optimal values from infinite combinations. Findings We developed heuristic algorithm named Push Algorithm that derives optimal combinations from infinite combinations of time and resources. Developed heuristic algorithm based on simulated annealing shows better improved results than genetic algorithm and further research suggestion was discussed as a project scheduling problem with multiple resources of real numbers.

Two-level Scheduling for Soft Real-Time Systems (소프트 실시간 시스템을 위한 두 단계 스케쥴링 알고리즘)

  • Kim, Jae-Hun
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.2
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    • pp.467-475
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    • 1999
  • This paper presents an algorithm for scheduling jobs in soft real-time systems. To simplify the scheduling for soft real-time systems, we introduce two-level deadline scheme. Each job in the system has two deadlines, which we call first-level and second-level deadlines, respectively. The first-level deadline is the same as the deadline in traditional real-time systems. The second-level deadline is later than the first-level deadline, and defines the latest point in time when the result is still acceptable. Partial-credit is given for jobs meeting the second-level deadline but missing the first-level deadline, whereas jobs meeting the latter are given full credit. We heuristically compute priorities of jobs in a dynamic way by combining the first-level adn second-level deadlines with the partial-credit. Simulation results indicate that our two-level scheduling algorithm is a viable approach for dealing with both soft real-time systems and temporary overloaded hard real-time systems.

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