• Title/Summary/Keyword: HBTs

Search Result 59, Processing Time 0.029 seconds

A novel radiation-dependence model of InP HBTs including gamma radiation effects

  • Jincan Zhang;Haiyi Cai;Na Li;Liwen Zhang;Min Liu;Shi Yang
    • Nuclear Engineering and Technology
    • /
    • v.55 no.11
    • /
    • pp.4238-4245
    • /
    • 2023
  • In order to predict the lifetime of InP Heterojunction Bipolar Transistor (HBT) devices and related circuits in the space radiation environment, a novel model including gamma radiation effects is proposed in this paper. Based on the analysis of radiation-induced device degradation effects including both DC and AC characteristics, a set of empirical expressions describing the device degradation trend are presented and incorporated into the Keysight model. To validate the effective of the proposed model, a series of radiation experiments are performed. The correctness of the novel model is validated by comparing experimental and simulated results before and after radiation.

Pd/Ge/Ti/pt Ohmic contact to InGaAs for Heterojunction Bipolar Transistors(HBTs) (이종접합 쌍극자 트랜지스터(HBT)의 에미터 접촉층으로 사용되는 InGaAs에 대한 Pd/Ge/Ti/Pt의 오믹 접촉 특성)

  • 김일호;장경욱;박성호(주)가인테크
    • Journal of the Korean Vacuum Society
    • /
    • v.10 no.2
    • /
    • pp.219-224
    • /
    • 2001
  • Pd/Ge/Ti/Pt ohmic contact to n-type InCaAs was investigated. Minimum specific contact resistivity of $3.7\times10^{-6}\; \Omega\textrm{cm}^2$ was achieved by rapid thermal annealing at $400^{\circ}C$ for 10 seconds. This was related to the formation of Pd-Ge compounds and the in-diffusion of Ge atoms to InGaAs surface. However, the specific contact resistivity increased slightly to $low-10^5\; \Omega\textrm{cm}^2$ in the case of longer annealing time. Superior ohmic contact and non-spiking planar interface between ohmic materials and InGaAs were maintained after annealing at high temperature. Therefore, this thermally stable ohmic contact system is a promising candidate for compound semiconductor devices.

  • PDF

Extraction of empirical formulas for electron and hole mobility in $In_{0.53}(Al_xGa_{1-x})_{0.47}As$ ($In_{0.53}(Al_xGa_{1-x})_{0.47}As$의 전자와 정공 이동도의 실험식 추출)

  • 이경락;황성범;송정근
    • Electrical & Electronic Materials
    • /
    • v.9 no.6
    • /
    • pp.564-571
    • /
    • 1996
  • We calculated the drift-velocities of electrons and holes of I $n_{0.53}$(A $l_{x}$G $a_{1-x}$ )$_{0.47}$As, which is used for semiconductor materials of high performance HBTs, along with the various doping concentrations and Al mole fractions as well as the electric fields by Monte Carlo experiment. Especially, for the valence bands the accuracy of hole-drift-velocity was improved in the consideration of intervalley scattering due to the inelastic scattering of acoustic phonon. From the results the empirical formulas of the low- and high field mobility of electrons and holes were extracted by using nonlinear least square fitting method. The accuracy of the formulas was proved by comparing the formula of low-field electron mobility as well as drift-velocity of I $n_{0.53}$ G $a_{0.47}$As and of low-field hole mobility of GaAs with the measured values, where the error was below 10%. For the high-field mobilities of electron and hole the results calculated by the formulas were very well matched with the MC experimental results except at the narrow field range where the electrons produced the velocity overshoot and the corresponding error was about 30%.0%. 30%.0%.

  • PDF

Fabrication and Characterization of AlGaAs/GaAs HBT (AlGaAs/GaAs HBT의 제작과 특성연구)

  • 박성호;최인훈;오응기;최성우;박문평;윤형섭;이해권;박철순;박형무
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.31A no.9
    • /
    • pp.104-113
    • /
    • 1994
  • We have fabricated n-p-n HBTs using 3-inchAlgaAs/GaAs hetero structure epi-wafers grown by MBE. DC and AC characteristics of HBT devices were measured and analyzed. For HBT epi-structure, Al composition of emitter was graded in the region between emitter cap and emitter. And base layer was designed with concentration of 1${\times}10^{19}/cm^{3}$ and thickness of 50nm, and Be was used as the p-type dopant. Principal processes for device fabrication consist of photolithography using i-line stepper, wet mesa etching, and lift-off of each ohmic metal. The PECVD SiN film was used as the inslator for the metal interconnection. HBT device with emitter size of 3${\times}10{\mu}m^{2}$ resulted in cut-off frequency of 35GHz, maximum oscillation frequency of 21GHz, and current gain of 60. The distribution of the ideality factor of collector and base current was very uniform, and the average values of off-set voltage and current was very uniform, and the average values of off-set voltage and current gain were 0.32V and 32 within a 3-inch wafer.

  • PDF

Emitter-base geometry dependence of electrical performance of AlGaAs/GaAs HBT (에미터와 베이스의 기하구조가 AlGaAs/GaAs HBT의 전기적 특성에 미치는 영향)

  • 박성호;최인훈;최성우;박문평;김영석;이재진;박철순;박형무
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.32A no.2
    • /
    • pp.57-65
    • /
    • 1995
  • The effects of device geometry and layout on high speed performance such as current gain outoff frequency(f$_{T}$) and maximum oscillation frequency(f$_{max}$) are of very improtant for the scaling-down of geterojunction bipolar transistors(HBT$_{s}$). In this paper AlGaAs/GaAs HBTs are fabricated by MBE epitaxial growth and conventional mesa process, and the experimental data of emitter-base geometru dependency of HBT performance are presented in order to provide the quantitative information for optimum device structure design. It is shown that f$_{T}$ and f$_{max}$ are inversely proportional to the emiter stripe width, while the low emitter perimeter/area ratio is better to f$_{T}$ and worse ot f$_{max}$. It is also demonstrated the f$_{T}$ and f$_{max}$ are highly improved by the emitter-base spacing reduction resulting in less parsitic effects. As the result f$_{T}$ of 42GHz and f$_{max}$ of 23GHz are obtained for fabricated HBT with emitter area of 3${\times}20^{\mu}m^{2}$ and E-B spacing of 0.2$\mu$m.m.m.

  • PDF

Fabrication of Transimpedance Amplifier Module and Post-Amplifier Module for 40 Gb/s Optical Communication Systems

  • Lee, Jong-Min;Min, Byoung-Gue;Kim, Seong-Il;Lee, Kyung-Ho;Kim, Hae-Cheon
    • ETRI Journal
    • /
    • v.31 no.6
    • /
    • pp.749-754
    • /
    • 2009
  • The design and performance of an InGaAs/InP transimpedance amplifier and post amplifier for 40 Gb/s receiver applications are presented. We fabricated the 40 Gb/s transimpedance amplifier and post amplifier using InGaAs/InP heterojunction bipolar transistor (HBT) technology. The developed InGaAs/InP HBTs show a cut-off frequency ($f_T$) of 129 GHz and a maximum oscillation frequency ($f_{max}$) of 175 GHz. The developed transimpedance amplifier provides a bandwidth of 33.5 GHz and a gain of 40.1 $dB{\Omega}$. A 40 Gb/s data clean eye with 146 mV amplitude of the transimpedance amplifier module is achieved. The fabricated post amplifier demonstrates a very wide bandwidth of 36 GHz and a gain of 20.2 dB. The post-amplifier module was fabricated using a Teflon PCB substrate and shows a good eye opening and an output voltage swing above 520 mV.

Current Gain Enhancement in SiGe HBTs (SiGe HBT의 Current Gain특성 향상)

  • 송오성;이상돈;김득중
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.5 no.4
    • /
    • pp.367-370
    • /
    • 2004
  • We fabricated SiGe BiCMOS devices, which are important for ultra high speed RF IC chips, by employing $0.35\mu{m}$ CMOS process. To meet with the requirement of low noise level with linear base leakage current at low VBE region, we try to minimize polysilicon/ silicon interface traps by optimizing capping silicon thickness and EDR(emitter drive-in RTA) temperature. We employed $200\AA$and $300\AA$-thick capping silicon, and varied the EDR process condition at temperature of $900-1000^\circ{C}$, and time of 0-30 sec at a given capping silicon thickness. We investigated current gain behavior at each process condition. We suggest that optimum EDR process condition would be $975^\circ{C}$-30 sec with $300\AA$-thick capping silicon for proposed $0.35\mu{m}$-SiGe HBT devices.

  • PDF

Formation of ITO Ohmic Contact to ITO/n+lnP for III-V Optoelectronic Devices (III-V 광소자 제작을 위한 ITO/n+lnP 옴 접촉 특성연구)

  • 황용한;한교용
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.15 no.5
    • /
    • pp.449-454
    • /
    • 2002
  • The use of a thin film of indium between the ITO and the $n^+-lnP$ contact layers for InP/InGaAs HPTs was studied without degrading its excellent optical transmittance properties. $ITO/n^+-lnP$ ohmic contact was successfully achieved by the deposition of indium and annealing. The specific contact resistance of about $6.6{\times}10^{-4}\Omega\textrm{cm}^2$ was measured by use of the transmission line method (TLM). However, as the thermal annealing was just performed to $ITO/n^+-lnP$ contact without the deposition of indium between ITO and $n^+-lnP$, it exhibited Schottky characteristics. In the applications, the DC characteristics of InP/InGaAs HPTs with ITO emitter contacts was compared with those of InP/InGaAs HBTs with the opaque emitter contacts.

A Wafer Level Packaged Limiting Amplifier for 10Gbps Optical Transmission System

  • Ju, Chul-Won;Min, Byoung-Gue;Kim, Seong-Il;Lee, Kyung-Ho;Lee, Jong-Min;Kang, Young-Il
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.4 no.3
    • /
    • pp.189-195
    • /
    • 2004
  • A 10 Gb/s limiting amplifier IC with the emitter area of $1.5{\times}10{\mu}m^2$ for optical transmission system was designed and fabricated with a AIGaAs/GaAs HBTs technology. In this stud)', we evaluated fine pitch bump using WL-CSP (Wafer Level-Chip Scale Packaging) instead of conventional wire bonding for interconnection. For this we developed WL-CSP process and formed fine pitch solder bump with the $40{\mu}m$ diameter and $100{\mu}m$ pitch on bonding pad. To study the effect of WL-CSP, electrical performance was measured and analyzed in wafer and package module using WL-CSP. In a package module, clear and wide eye diagram openings were observed and the riselfall times were about 100ps, and the output" oltage swing was limited to $600mV_{p-p}$ with input voltage ranging from 50 to 500m V. The Small signal gains in wafer and package module were 15.56dB and 14.99dB respectively. It was found that the difference of small signal gain in wafer and package module was less then 0.57dB up to 10GHz and the characteristics of return loss was improved by 5dB in package module. This is due to the short interconnection length by WL-CSP. So, WL-CSP process can be used for millimeter wave GaAs MMIC with the fine pitch pad.

Design of high speed InAlGaAs/InGaAs HBT structure by Hybrid Monte Carlo Simulation (Hybrid Monte Carlo 시뮬레이션에 의한 고속 InAlGaAs/InGaAs HBT의 구조 설계)

  • 황성범;김용규;송정근;홍창희
    • Journal of the Korean Institute of Telematics and Electronics D
    • /
    • v.36D no.3
    • /
    • pp.66-74
    • /
    • 1999
  • InAlGaAs/InGaAs HBTs with the various emitter junction gradings(xf=0.0-1.0) and the modified collector structures (collector- I;n-p-n, collector-II;i-p-n) are simulated and analyzed by HMC (Hybrid Monte Carlo) method in order to find an optimum structure for the shortest transit time. A minimum base transit time($ au$b) of 0.21ps was obtainsed for HBT with the grading layer, which is parabolically graded from $x_f$=1.0 and xf=0.5 at the emitter-base interface. The minimum collector transit time($\tau$c) of 0.31ps was found when the collector was modified by inserting p-p-n layers, because p layer makes it possible to relax the electric field in the i-type collector layer, confining the electrons in the $\Gamma$-valley during transporting across the collector. Thus InAlGaAs/InGaAs HBT in combination with the emitter grading($x_f$=0.5) and the modified collector-III showed the transit times of 0.87 psec and the cut-off frequency (f$\tau$) of 183 GHz.

  • PDF