• 제목/요약/키워드: H-gate

검색결과 626건 처리시간 0.025초

SiGe JFET과 Si JFET의 전기적 특성 비교 (Comparison Study on Electrical Properties of SiGe JFET and Si JFET)

  • 박병관;양현덕;최철종;심규환
    • 한국전기전자재료학회논문지
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    • 제22권11호
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    • pp.910-917
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    • 2009
  • We have designed a new structures of Junction Field Effect Transistor(JFET) using SILVACO simulation to improve electrical properties and process reliability. The device structure and process conditions of Si control JFET(Si JFET) were determined to set cut off voltage and drain current(at Vg=0 V) to -0.46 V and $300\;{\mu}A$, respectively. Among many design parameters influencing the performance of the device, the drive-in time of p-type gate is presented most predominant effects. Therefore we newly designed SiGe JFET, in which SiGe layers were placed above and underneath of Si-channel. The presence of SiGe layer could lessen Boron into the n-type Si channel, so that it would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer could be explained in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.

사출금형의 냉각채널 성능 평가 (PERFORMANCE EVALUATION OF COOLING CHANNELS IN A PLASTIC INJECTION MOLD MODEL)

  • 김현수;한병윤;이일천;김영만;박형구
    • 한국전산유체공학회지
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    • 제17권2호
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    • pp.53-57
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    • 2012
  • Design of the cooling channels of a plastic injection mold affects the quality and the productivity of the injection processes. In the injection process, the melted resin with high temperature enters the mold cavity, and just after the cavity is filled the heat should be dissipated through the cooling channels simultaneously. The purpose of this study is to analyse the heat transfer phenomenon and to estimate the temperature distribution in the mold to evaluate the cooling effect of the channels. The injection mold is assumed to have cooling channels of circular cross section and each channel has the same coolant flow rate. and The cavity has a rectangular shape. The results show that as the cooling channels get closer to the cavity surface, the cooling efficiency increases as might easily be guessed. However, due to the final hot resin flow from the gate an intensive cooling is required in that region.

Novel AC bias compensation scheme in hydrogenated amorphous silicon TFT for AMOLED Displays

  • Parikh, Kunjal;Chung, Kyu-Ha;Choi, Beom-Rak;Goh, Joon-Chul;Huh, Jong-Moo;Song, Young-Rok;Kim, Nam-Deog;Choi, Joon-Hoo
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.1701-1703
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    • 2006
  • Here we describe a novel driving scheme in the form of negative AC bias stress (NAC) to compensate shift in the threshold voltage for hydrogenated amorphous silicon (${\alpha}$-Si:H) thin film transistor (TFT) for AMOLED applications. This scheme preserves the threshold voltage shift of ${\alpha}$-Si:H TFT for infinitely long duration of time(>30,000 hours) and thereby overall performance, without using any additional TFTs for compensation. We briefly describe about the possible driving schemes in order to implement for real time AMOLED applications. We attribute most of the results based on concept of plugging holes and electrons across the interface of the gate insulator in a controlled manner.

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산화알루미늄 박막을 이용한 SiC MIS 구조의 제작 및 전기적 특성 (Fabrication and Electrical Properties of SiC MIS Structures using Aluminum Oxide Thin Film)

  • 최행철;정순원;정상현;윤형선;김광호
    • 한국전기전자재료학회논문지
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    • 제20권10호
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    • pp.859-863
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    • 2007
  • Aluminum oxide films were deposited on n-type 6H-SiC(0001) substrates by RF magnetron sputtering technique for MIS devices applications. Well-behaved C-V characteristics were obtained measured in MIS capacitors structures. The calculated interface trap density measured at $300^{\circ}C$ was about $4.6{\times}10^{10}/cm^2\;eV$ in the upper half of the bandgap. The gate leakage current densities of the MIS structures were about $10^{-8}A/cm^2$ and about $10^{-6}A/cm^2$ measured at room temperature and at $300^{\circ}C$ for a ${\pm}1\;MV/cm$, respectively These results indicate that the interface property of this structure is enough quality to MIS devices applications.

아날로그/디지탈 회로 구성에 쓰이는 BCDMOS소자의 제작에 관한 연구 (A Study on the Analog/Digital BCDMOS Technology)

  • 박치선
    • 대한전자공학회논문지
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    • 제26권1호
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    • pp.62-68
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    • 1989
  • 본 논문에서는 아날로그/디지탈 회로 구성시 입출력부는 바이폴라 소자로 내부의 논리회로 부분은 CMOS 소자로 높은 내압을 요구하는 부분에는 DMOS 소자를 이용할 수 있는, BCDMOS 공정 기술개발을 하고자 하였다. BCDMOS 제작 공정은 폴리게이트 p-well CMOS 공정을 기본으로 하였고, 소자설계의 기본개념은 공정흐름을 복잡하지 않게 하면서 바이폴라, CMOS, DMOS 소자 각각의 특성을 좋게하는데 두었다. 실험결과로서 바이폴라 npn 트랜지스터의 $h_{FE}$ 특성은 320(Ib-$10{\mu}A$)정도이며, CMOS 소자에서는 n-채자에서는 항복전압이 115V이상의 특성을 얻을 수 있었다.

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TMD parameters optimization in different-length suspension bridges using OTLBO algorithm under near and far-field ground motions

  • Alizadeh, Hamed;Lavasani, H.H.
    • Earthquakes and Structures
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    • 제18권5호
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    • pp.625-635
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    • 2020
  • Suspension bridges have the extended in plan configuration which makes them prone to dynamic events like earthquake. The longer span lead to more flexibility and slender of them. So, control systems seem to be essential in order to protect them against ground motion excitation. Tuned mass damper or in brief TMD is a passive control system that its efficiency is practically proven. Moreover, its parameters i.e. mass ratio, tuning frequency and damping ratio can be optimized in a manner providing the best performance. Meta-heuristic optimization algorithm is a powerful tool to gain this aim. In this study, TMD parameters are optimized in different-length suspension bridges in three distinct cases including 3, 4 and 5 TMDs by observer-teacher-learner based algorithm under a complete set of ground motions formed from both near-field and far-field instances. The Vincent Thomas, Tacoma Narrows and Golden Gate suspension bridges are selected for case studies as short, mean and long span ones, respectively. The results indicate that All cases of used TMDs result in response reduction and case 4TMD can be more suitable for bridges in near and far-field conditions.

수력댐 비상방류밸브의 선정조건에 관한 연구 (The Study of the Decision Criteria for the Urgency Released Valve in Hydraulic Dam)

  • 노형운;이갑수;박영무;김범석;이영호
    • 유체기계공업학회:학술대회논문집
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    • 유체기계공업학회 2005년도 연구개발 발표회 논문집
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    • pp.613-616
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    • 2005
  • In general, the hollow jet valve, the fixed cone valve had been used for the urgency released or maintenance of the flow rate. Nowadays, the butterfly valve, the gate valve are applied in economic performance and operation maintenance more than the hollow jet valve, the fixed cone valve. However, in the case of butterfly valve, it should be required the strict application standard to the cavitation coefficient because the structural axis and disk were situated in pipe channel and the occurring the shock problem by Karman Vortex. And, the judgment data for choice were slight lowdown in water supply and drainage facilities standard or Japanese penstock technology standard, various standard of KOWACO etc. Therefore. there were investigated the valve inside phenomenon (cavitation, disk chattering, vibration) by velocity of flow and the stability examination of body by high velocity of flow through flow scale model test using the numerical analysis and PIV to establish the applicable extensibility of the butterfly valve for the urgency released valve.

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Properties and Applications of Magnetic Tunnel Junctions

  • Reiss, G.;Bruckl, H.;Thomas, A.;Justus, M.;Meyners, D.;Koop, H.
    • Journal of Magnetics
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    • 제8권1호
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    • pp.24-31
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    • 2003
  • The discoveries of antiferromagnetic coupling in Fe/Cr multilayers by Grunberg, the Giant Magneto Resistance by Fert and Grunberg and a large tunneling magnetoresistance at room temperature by Moodera have triggered enormous research on magnetic thin films and magnetoelectronic devices. Large opportunities are especially opened by the spin dependent tunneling resistance, where a strong dependence of the tunneling current on an external magnetic field can be found. We will briefly address important basic properties of these junctions like thermal, magnetic and dielectric stability and discuss scaling issues down to junction sizes below 0.01 $\mu\textrm{m}$$^2$with respect to single domain behavior, switching properties and edge coupling effects. The second part will give an overview on applications beyond the use of the tunneling elements as storage cells in MRAMs. This concerns mainly field programmable logic circuits, where we demonstrate the clocked operation of a programmed AND gate. The second 'unconventional' feature is the use as sensing elements in DNA or protein biochips, where molecules marked magnetically with commercial beads can be detected via the dipole stray field in a highly sensitive and relatively simple way.

System Strategies for Time-Domain Emission Measurements above 1 GHz

  • Hoffmann, Christian;Slim, Hassan Hani;Russer, Peter
    • Journal of electromagnetic engineering and science
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    • 제11권4호
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    • pp.304-310
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    • 2011
  • The application of time-domain methods in emission measurement instruments allows for a reduction in scan time by several orders of magnitude and for new evaluation methods to be realized such as the real-time spectrogram to characterize transient emissions. In this paper two novel systems for time-domain EMI measurements above 1 GHz are presented. The first system combines ultra-fast analog-to-digital-conversion and real-time digital signal processing on a field-programmable-gate-array (FPGA) with ultra-broadband multi-stage down-conversion to enable measurements in the range from 10 Hz to 26 GHz with high sensitivity and full-compliance with the requirements of CISPR 16-1-1. The required IF bandwidths were added to allow for measurements according to MIL-461F and DO-160F. The second system realizes a system of time-interleaved analog-to-digital converters (ADCs) and has an upper bandwidth limit of 4 GHz. With the implementation of an automatic mismatch calibration, the system fulfills CISPR 16-1-1 dynamic range requirements. Measurements of the radiated emissions of electronic consumer devices and household appliances like the non-stationary emissions of a microwave oven are presented. A measurement of a personal computer's conducted emissions on a power supply line according to DO-160F is given.

비정질 및 다결정 실리콘 TFT-LCD에서의 플리커(flicker) 현상 비교 분석 연구 (A Comparative Study on the Quantitative Analysis of the Flicker Phenomena in the Amorphous-Silicon and Poly-Silicon TFT-LCDs)

  • 손명식;송민수;유건호;장진
    • 대한전자공학회논문지SD
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    • 제40권1호
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    • pp.20-28
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    • 2003
  • In this paper, we present results of the comparative analysis of the flicker phenomena in the poly-Si TFT-LCD and a-Si:H TFT-LCD arrays for the development and manufacturing of wide-area and high-quality TFT-LCD displays. We used four different types of TFTs; a-Si:H TFT, excimer laser annealed (ELA) poly-Si TFT, silicide mediated crystallization (SMC) poly-Si TFT, and counter-doped lateral body terminal (LBT), poly-Si TFT. We defined the electrical quantity of the flicker so that we could compare the flickers quantitatively for four different 40" UXGA TFT-LCDs. We identify three factors contributing to the flicker, such as charging time, kickback voltage and leakage current, and analyze how much each of three factors give rise to the flincker in the different TFT-LCD arrays. In addition, we suggest and show that, in the case of the poly-Si TFT-LCD arrays, the low-level (minimum) gate voltages should be carefully chosen to minimize the flicker because of their larger leakage currents compared with a-Si TFT-LCD arrays.