• 제목/요약/키워드: Gate-Cycle

검색결과 155건 처리시간 0.027초

인공위성의 자세제어용 3-축 Flux-gate 마그네토미터 제작 (Construction of 3-Axis Flux-gate Magnetometer for Attitude Control of Satellite)

  • 손대락
    • 한국자기학회지
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    • 제16권3호
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    • pp.182-185
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    • 2006
  • 본 연구에서는 인공위성의 자세제어용으로 사용될 3-축 flux-gate 마그네토 미터를 개발 제작하였다. 제작된 3-축의 flux-gate 마그네토 미터는 소비전력이 1W 미만에서 정확도는 ${\pm}1%$ 이내였으며 noise는 1Hz에서 $0.2nT/\sqrt{Hz}$이였다. 또한 제작된 마그네토미터를 인공위성에 적용하기 위한 환경시험을 수행하였다. 환경시험으로 가속도시험은 진동주파수의 범위가 $10Hz{\sim}1000Hz$에서 15g(g : 지구의 중력가속도)의 가속도에서 수행하였고, themal cycle 시험은 $1x10^{-6}$ Torr의 진공에서 $-55^{\circ}C{\sim}80^{\circ}C$의 온도 사이에서 24시간 동안 4회의 thermal cycle 시험을 한 결과 모두 정상 작동 되었다.

양자 논리회로의 정보 가역성에 대한 고찰 (A Study on the Information Reversibility of Quantum Logic Circuits)

  • 박동영
    • 한국전자통신학회논문지
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    • 제12권1호
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    • pp.189-194
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    • 2017
  • 양자논리회로의 가역성은 정보 가역적 및 에너지 가역적 회로라는 두 가지 가역 조건을 만족할 때 실현될 수 있다. 본 논문은 다치 양자논리 회로에서 원래상태로의 정보가역성 회복에 필요한 연산 사이클을 모델링하였다. 모델링을 위해 유니터리 스위치를 산술 멱승 스위치로 사용하는 함수 임베딩 방법을 사용하였다. 양자논리회로에서 수반게이트 쌍이 대칭이면 유니터리 스위치함수가 균형함수 특성을 보임으로써 원래상태의 정보 가역성 회복에 1 사이클 연산이 소요되었다. 반대로 비대칭 구조이면 상수 함수에 의해 2 사이클 연산이 소요되었다. 본 논문은 ternary M-S 게이트로 hybrid MCT 게이트를 실현할 경우의 비대칭 구조에 따른 2 사이클 복원 문제는 비대칭 구조의 수반게이트들을 대칭구조의 수반게이트로 등가 변환하여 해결할 수 있음을 밝혔다.

An Accurate Gate-level Stress Estimation for NBTI

  • Han, Sangwoo;Lee, Junho;Kim, Byung-Su;Kim, Juho
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제13권2호
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    • pp.139-144
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    • 2013
  • Negative bias temperature instability (NBTI) has become a major factor determining circuit reliability. The effect of the NBTI on the circuit performance depends on the duty cycle which represents the stress and recovery conditions of each device in a circuit. In this paper, we propose an analytical model to perform more accurate duty cycle estimation at the gate-level. The proposed model allows accurate (average error rate: 3%) computation of the duty cycle without the need for expensive transistor-level simulations Furthermore, our model estimates the waveforms at each node, allowing various aging effects to be applied for a reliable gate-level circuit aging analysis framework.

배수문에서 실내모형실험에 의한 무동력 토사제거시스템의 수리 특성 (Hydraulic Characteristics of the Non-power Soil Cleaning and Keeping System by the Large-Scale Model Test at the Dike Gate)

  • 박찬근;오범환;이달원
    • 한국농공학회논문집
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    • 제56권5호
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    • pp.67-75
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    • 2014
  • In this study, the large-scale hydraulic model test was performed to investigate the hydraulic characteristics for development of the non-power soil cleaning and keeping system at the dike gate. The outlet height, outflow number, outflow discharge, and outflow cycle were compared and analyzed. The non-power soil cleaning and keeping system was most effective at 11.2 mm in the outlet height. And then the mean outflow cycle was 1.09 sec, and the mean outflow discharge was $0.00164m^3/s$. The total outflow number increased gradually as the water level of a water tank increased, and the outlet height decreased. As a level of water tank decreased, the mean outflow cycle was lengthened, and the unit outflow discharge increased. This result showed this system was most effective. To remove the silty clay deposited in facilities, the methods of excavation, dredging, high pressure washing, etc have been applied to the tidal facilities such as land reclamation, a small size fishing port, and a harbor for maintenance. However, this is extremely cost-ineffective, whereas the non-power soil cleaning and keeping system will bring about an enormously positive economic effect. In addition, when the non-power soil cleaning and keeping system is applied to the dike gate of land reclamation, a thorough examination of the local tidal data and the careful system planning are required to prevent the disaster damage caused by flooding.

Gate 구동 회로를 집적한 TFT-LCD에서 a-Si:H TFT Instability의 영향 (Effect of a-Si:H TFT Instability on TFT-LCD Panel with Integrated Gate Driver Circuits)

  • 이현수;이준신;이종환
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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    • pp.172-175
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    • 2005
  • a-Si TFT는 TFT-LCD의 화소 스위칭(swiching) 소자로 폭넓게 이용되고 있다. 현재는 a-Si을 이용하여 gate drive IC를 기판에 집적하는 기술이 연구, 적용되고 있는데 이때 가장 큰 제약은 문턱 전압의 이동이다. 펄스(pulse)형태로 인가되는 gate 전압에 의한 문턱 전압 이동은 a-Si:H gate에 인가되는 펄스의 크기, duty cycle, drain pulse의 크기 및 동작 온도에 기인하며 실험결과를 통해 입증된다. 초기의 DC Stress 측정 Data를 이용하여 문턱전압이동을 모델링/시뮬레이션한 결과 a-Si:H gate 회로설계 및 펄스 조건에 따라 stress시간에 따른 gate의 출력 파형 예측이 가능하고 상온에서 Von=21V를 인가한 결과, 약 4년후에서 시프트레지스터 출력 파형이 열화되기 시작한다.

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수문용 대형 유압실린더의 신뢰성 평가 (Reliability assessment test for heavy sluice gate of hydraulic cylinder)

  • 이용범;현동수;김형의;이근호;정동수
    • 한국신뢰성학회:학술대회논문집
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    • 한국신뢰성학회 2001년도 정기학술대회
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    • pp.91-97
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    • 2001
  • These Study are for the development of the reliability assessment test code and test equipment and test procedures of the heavy sluice gate hydraulic cylinder. Because there is no reliability test code for the heavy sluice gate hydraulic cylinder inside and outside of the country, the modified reliability test code is made reference for the related existing standards like as ISO, JIS, MIL, TUV, DIN, KS and etc. In this study, the novel method is proposed to evaluate efficiency of the heavy sluice gate hydraulic cylinder on the loading conditions and established the conditions of the acceleration life test to reduce the testing time and cycles. The testing equipments for life test, lode operating test, high and low temperature test and salt spray test have been established for 8 month, and the reliability tests are accomplished. The test results of the heavy sluice gate hydraulic cylinder which is produced and tested initially in Korea are satisfied the durability life cycle on the using conditions.

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EEPROM 셀에서 폴리실리콘 플로팅 게이트의 도핑 농도가 프로그래밍 문턱전압에 미치는 영향 (Effects of Doping Concentration in Polysilicon Floating Gate on Programming Threshold Voltage of EEPROM Cell)

  • 장성근;김윤장
    • 한국전기전자재료학회논문지
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    • 제20권2호
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    • pp.113-117
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    • 2007
  • We have investigated the effects of doping concentration in polysilicon floating gate on the endurance characteristics of the EEPROM cell haying the structure of spacer select transistor. Several samples were prepared with different implantation conditions of phosphorus for the floating gate. Results show the dependence of doping concentration in polysilicon floating gate on performance of EEPROM cell from the floating gate engineering point of view. All of the samples were endured up to half million programming/erasing cycle. However, the best $program-{\Delta}V_{T}$ characteristic was obtained in the cell doped at the dose of $1{\times}10^{15}/cm^{2}$.

관개용 저수지 농업용수의 국가 전과정 목록분석 데이터베이스 구축 (Development of National Life Cycle Inventory Database on Irrigation Water by Agricultural Dam)

  • 김영득;박필주
    • 한국농공학회논문집
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    • 제53권3호
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    • pp.59-64
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    • 2011
  • The objective of the study is to develop life cycle inventory (LCI) database of dam, a major facility for irrigation water supply. The types of database developed are three out of nine dams according to the size of the wate r storage capacity: two kinds larger than 500,000 $m^3$ depending on gate for discharging (Type 1) and the other dam smaller than 500,000 $m^3$ (Type 2). According to the LCI analysis, type 1 larger than 500,000 $m^3$ storage capacity with gate has the lowest environment impact in the 6 impact categories. The impact of the type 1 accounts for 7~35 % of the type 2 for supplying irrigation water. Comparing with the environment impacts of water for other uses such as drinking and industrial water, the impacts of 1 $m^3$ irrigation water supply is 4~45 % of the one for industrial water supply and 1~16 % of the drinking water's. The three types of LCI DB on the irrigation water by dams will be useful in the application of Life Cycle Assessment in agricultural products and environmental labelling including carbon footprint since it is complied to the guidelines of LCI DB constr uction issued by Ministry of Environment and Ministry of Knowledge Economy.

GaAs MESFET의 온도변화에 다른 게이트 누설전류 특성 (Gate Leakage Current Characteristics of GaAs MESFETS′ with different Temperature)

  • 원창섭;김시한;안형근;한득영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.50-53
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    • 2001
  • In this study, gate leakage current mechanism has been analyzed for GaAs MESFET with different temperatures ranging from 27$^{\circ}C$ to 300$^{\circ}C$ . It is expected that the thermionic and field emission at the MS contact will dominate the current flow. Thermal cycle is applied to test the reliability of the device. From the results, it is proved that thermal stress gradually increases the gate leakage current at the same bias conditions and leads to the breakdown and failure mechanism which is critical in the field equipment. Finally the gate contact under the repeated thermal shock has been tested to check the quality of Schottky barrier and the current will be expressed in the analytical from to associate with the electrical characteristics of the device.

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CoolSiCTM SiC MOSFET Technology, Device and Application

  • Ma, Kwokwai
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2017년도 전력전자학술대회
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    • pp.577-595
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    • 2017
  • ${\bullet}$ Silicon Carbide (SiC) had excellent material properties as the base material for next generation of power semiconductor. In developing SiC MOSFET, gate oxide reliability issues had to be first overcome before commercial application. Besides, a high and stable gate-source voltage threshold $V_{GS(th)}$ is also an important parameter for operation robustness. SiC MOSFET with such characteristics can directly use existing high-speed IGBT gate driver IC's. ${\bullet}$ The linear voltage drop characteristics of SiC MOSFET will bring lower conduction loss averaged over full AC cycle compared to similarly rate IGBT. Lower switching loss enable higher switching frequency. Using package with auxiliary source terminal for gate driving will further reduce switching losses. Dynamic characteristics can fully controlled by simple gate resistors. ${\bullet}$ The low switching losses characteristics of SiC MOSFET can substantially reduce power losses in high switching frequency operation. Significant power loss reduction is also possible even at low switching frequency and low switching speed. in T-type 3-level topology, SiC MOSFET solution enable three times higher switching freqeuncy at same efficiency.

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