• Journal of IKEEE
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• v.25 no.1
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• pp.15-24
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• 2021

In this paper, 1700 V EPDT (Extended P+ shielding floating gate Double Trench) MOSFET structure, which has a smaller switching time and loss than CDT (Conventional Double Trench) MOSFET, is proposed. The proposed EPDT MOSFET structure extended the P+ shielding area of the source trench in the CDT MOSFET structure and divided the gate into N+ and floating P- polysilicon gate. By comparing the two structures through Sentaurus TCAD simulation, the on-resistance was almost unchanged, but Crss (Gate-Drain Capacitance) decreased by 32.54 % and 65.5 %, when 0 V and 7 V was applied to the gate respectively. Therefore, the switching time and loss were reduced by 45 %, 32.6 % respectively, which shows that switching performance was greatly improved.

• Journal of IKEEE
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• v.27 no.1
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• pp.103-108
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• 2023

This research was carried out experiments with changing processes and design parameters to optimally design a SiC-based 1200V power MOSFET, and then, essential electrical characteristics were derived. In order to secure the excellence of the trench gate type SiC power MOSFET device to be designed, electrical characteristics were derived by designing it under conditions such as planner gate SiC power MOSFET, and it was compared with the trench gate type SiC power MOSFET device. As a result of the comparative analysis, the on-resistance while maintaining the yield voltage was 1,840mΩ, for planner gate power MOSFET and to 40mΩ for trench gate power MOSFET, respectively, indicating characteristics more than 40 times better. It was judged that excellent results were derived because the temperature resistance directly affects energy efficiency. It is predicted that the devices optimized through this experiment can sufficiently replace the IGBT devices generally used in 1200V class, and that since the SiC devices are wide band gap devices, they will be widely used to apply semiconductors for vehicles using devices with excellent thermal characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.12
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• pp.1087-1091
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• 2005

Four-probe device of single ZnO nanowire was fabricated by electron beam lithography. Electrical characterizations in a two-probe and a four-probe configuration with a back-gate were carried out to clarify the relative contribution of the contact and the intrinsic part in a ZnO nanowire. I-V characteristic in four-probe measurement showed an ohmic behavior with a high conductivity, 100 S/cm, which was better than those of two-probe measurement by 10 times. At the same values of the current between two-probe and four-probe, the net voltage applied inside the nanowire were extracted with calculated voltages at the contact. Four-probe current-gate voltage characteristics showed bigger tendencies than those of two-probe measurement at low temperatures, indicating the reduced gate dependence in two-Probe measurements by the existence of the contact resistance.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.10
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• pp.665-671
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• 2017

Herein, we report the fabrication of low-voltage N-type organic field-effect transistors by using high capacitance fluorinated polymer gate dielectrics such as P(VDF-TrFE), P(VDF-TrFE-CTFE), and P(VDF-TrFE-CFE). Electron-withdrawing functional groups in PVDF-based polymers typically cause the depletion of negative charge carriers and a high contact resistance in N-channel organic semiconductors. Therefore, we incorporated intermediate layers of a low-k polymerto prevent the formation of a direct interface between PVDF-based gate insulators and the semiconducting active layer. Consequently, electron depletion is inhibited, and the high charge resistance between the semiconductor and source/drain electrodes is remarkably improved by the in corporation of solution-processed charge injection layers.

• Proceedings of the Korea Concrete Institute Conference
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• 2010.05a
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• pp.207-208
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• 2010

The building that supply tidal and splash zone was constructed near Seamangeum Gate Bridge. The specimens that will be tested for maintenance of gate bridge were exposed on the tidal and splash zone, totally about 650. The characteristics of strength, salt penetration profile, field application of surface repair material and section recover material will be acquired by periodical test. The program was developed to obtain optimal maintenance strategy of gate bridge as a marine concrete structure and to deposit experimental data, lab. test result, field test result, on its D/B. On this paper, the comparison of concrete and recover material in the salt penetration characteristics was expressed. The quantitative analysis of salt contents in concrete surface was most important so the improvement for the machine of gathering power of concrete and the apparatus of measuring chloride contents was proceeded at this time. The two conclusions were summarized like as - The resistance of chloride attack of concrete was appeared 2.5 times bigger than that of recover material - The resistance of chloride attack of polymer series was appeared more higher than that of others.

• Applied Science and Convergence Technology
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• v.23 no.4
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• pp.192-199
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• 2014

The electronic property of graphene was investigated by hydrazine treatment. Hydrazine ($N_2H_4$) highly increases electron concentrations and up-shifts Fermi level of graphene based on significant shift of Dirac point to the negative gate voltage. We have observed contact resistance and channel length dependent mobility of graphene in the back-gated device after hydrazine monohydrate treatment and continuously monitored electrical characteristics under Nitrogen or air exposure. The contact resistance increases with hydrazine-treated and subsequent Nitrogen-exposed devices and reduces down in successive Air-exposed device to the similar level of pristine one. The channel conductance curve as a function of gate voltage in hole conduction regime keeps analogous value and shape even after Nitrogen/Air exposure specially whereas, in electron conduction regime change rate of conductance along with the level of conductance with gate voltage are decreased. Hydrazine could be utilized as the highly effective donor without degradation of mobility but the stability issue to be solved for future application.

• Journal of IKEEE
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• v.26 no.3
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• pp.500-505
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• 2022

In this study, we designed oxide thin-film transistors (TFTs) with dual gate and tri layered split channels, and investigated the structural effect of the TFTs on the electrical characteristics. The dual gates played a key role in increasing the driving current, and the channel structure of tri layers and split form contributed to the increase in the carrier mobility. The tri layered channels consisting of the a-ITGZO and two ITO layers inserted between the gate dielectric and a-ITGZO led to the increase in the on-current by using ITO layers with high conductivity, and the split channels lowered series resistance of the channels. Compared with the mobility (15 cm²/V·s) of the single gate a-ITGZO TFT, the mobility (134 cm²/V·s) of the dual gate tri-layer split channel TFT was remarkably enhanced by the structural effect.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.88-91
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• 2000

An MMIC oscillator operating at the 24.55 GHz has been designed using 0.2 ${\mu}{\textrm}{m}$AlGaAs/InGaAs/GaAs Pseudomorphic HEMT technology. The active device used in the oscillator design has a 0.2 ${\mu}{\textrm}{m}$ gate length PHEMT with 4$\times$80 ${\mu}{\textrm}{m}$ gate width. We obtained 4.08 dB of S$_{21}$ gain and 317 mS/mm of transconductance, and extrapolated unit current gain cut-off frequency (f$_{T}$) and maximum oscillation frequency (fmax) were 62 GHz and 120 GHz, respectively. The circuit are based on a series feedback and negative resistance topology. Microstrip line open stub is used to terminating. The oscillator circuits has designed for delivering maximum power to load and conjugated matching. The simulated small signal negative resistance was 50 Ω. We obtained 1.002 of loop gain and 0.0005$^{\circ}$angle from the simulation by HP libra 6.1. The layout for oscillator is 1.2$\times$1.8 $\textrm{mm}^2$.>.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.217-220
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• 2002

In this paper, we have investigated electronical chara-cteristics of power LDMOSFETS having different ex-tended gate lengths(1.B${\mu}{\textrm}{m}$, 2.4${\mu}{\textrm}{m}$, 3.O${\mu}{\textrm}{m}$) in the temperature range of 300k-500K. The results of this study indicate that on-resistance, breakdown voltage increase with temperature. and drain current, threshold voltage, transconductance decrease with temperature. Particular the facts, we observed that Le is the more increase, on-resistance is the more decrease. because every conditions are fixed normal states, only change the Le. As a result, Ron/BV, known for a figure of merit of power device, increase with temperature.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.9
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• pp.713-717
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• 2011

This paper was carried out design of 600 V GaN power MOSFET Modeling. We decided trench gate type one for design. we carried out device and process simulation with T-CAD tools. and then, we have extracted optimal device and process parameters for fabrication. we have analysis electrical characteristics after simulations. As results, we obtained 600 V breankdown voltage and $0.4\;m{\Omega}cm^2ultra$ low on resistance. At the same time, we carried out field ring simulation for obtaining high voltage.