DOI QR코드

DOI QR Code

A Novel 1700V 4H-SiC Double Trench MOSFET Structure for Low Switching Loss

스위칭 손실을 줄인 1700 V 4H-SiC Double Trench MOSFET 구조

  • Na, Jae-Yeop (Dept. of Electronics Engineering, Sogang University) ;
  • Jung, Hang-San (Dept. of Electronics Engineering, Sogang University) ;
  • Kim, Kwang-Su (Dept. of Electronics Engineering, Sogang University)
  • Received : 2021.02.10
  • Accepted : 2021.03.24
  • Published : 2021.03.31

Abstract

In this paper, 1700 V EPDT (Extended P+ shielding floating gate Double Trench) MOSFET structure, which has a smaller switching time and loss than CDT (Conventional Double Trench) MOSFET, is proposed. The proposed EPDT MOSFET structure extended the P+ shielding area of the source trench in the CDT MOSFET structure and divided the gate into N+ and floating P- polysilicon gate. By comparing the two structures through Sentaurus TCAD simulation, the on-resistance was almost unchanged, but Crss (Gate-Drain Capacitance) decreased by 32.54 % and 65.5 %, when 0 V and 7 V was applied to the gate respectively. Therefore, the switching time and loss were reduced by 45 %, 32.6 % respectively, which shows that switching performance was greatly improved.

본 논문에서는 CDT(Conventional Double Trench) MOSFET보다 스위칭 시간과 손실이 적은 1700 V EPDT(Extended P+ shielding floating gate Double Trench) MOSFET 구조를 제안하였다. 제안한 EPDT MOSFET 구조는 CDT MOSFET에서 소스 Trench의 P+ shielding 영역을 늘리고 게이트를 N+와 플로팅 P- 폴리실리콘 게이트로 나누었다. Sentaurus TCAD 시뮬레이션을 통해 두 구조를 비교한 결과 온 저항은 거의 차이가 없었으나 Crss(게이트-드레인 간 커패시턴스)는 게이트에 0 V 인가 시에는 CDT MOSFET 대비 32.54 % 줄었고 7 V 인가 시에는 65.5 % 감소하였다. 결과적으로 스위칭 시간 및 손실은 각각 45 %, 32.6 % 줄어 스위칭 특성이 크게 개선되었다.

Keywords

References

  1. Huang Runhua, Tao Yonghong, Bai Song, Chen Gang, Wang Ling, Liu Ao, Wei Neng, Li Yun, and Zhao Zhifei, "Design and fabrication of a 3.3 kV 4H-SiC MOSFET," Journal of Semiconductors, Vol.36, No.9, 2015. DOI: 10.1088,1674-4926/36/9/094002 https://doi.org/10.1088,1674-4926/36/9/094002
  2. B. J. Baliga, Silicon Carbide Power Devices, World Scientific, 2006. DOI: 10.1142/5986
  3. Q. Song, S. Yang, G. Tang, C. Han, Yimeng Zhang, X. Tang, Yimen Zhang, Yuming Zhang, "4H-SiC Trench MOSFET With L-Shaped Gate," IEEE Electron Device Letters, Vol.37, No.4, 2016. DOI: 10.1109/LED.2016.2533432
  4. Xiaorong Luo, Tian Liao, Jie Wei, Jian Fang, Fei Yang, and Bo Zhang, "A novel 4H-SiC trench MOSFET with double shielding structures and ultralow gate-drain charge," Journal of Semiconductors, Vol.40, No.5, 2019. DOI: 10.1088/1674-4923/40/5/052803
  5. Madankumar Sampath, Dallas Morisette, and James A. Cooper, "Comparison of Single-and Double-Trench UMOSFETs in 4H-SiC," Materials Science Forum, Vol.924, pp.752-755, 2018. DOI: 10.4028/www.scientific.net/MSF.924.752
  6. Jheng-Yi Jiang, Tian-Li Wu, Feng Zhao, and Chih-Fang Huang, "Numerical Study of 4H-SiC UMOSFETs with Split-Gate and P+ Shielding," Energies, 2020. DOI: 10.3390/en13051122
  7. J. Cheon, K. Kim, "Numerical Simulation Analysis of Switching Characteristics in the Source-Trench MOSFET's," Electronics, 2020. DOI: 10.3390/electronics9111895
  8. H. Raee, A. Rabiei and T. Thiringer, "Analytical prediction of switching losses in MOSFETs for variable drain-source voltage and current applications," in Industrial Electronics and Applications (ICIEA), pp.705-709, 2013. DOI: 10.1109/ICIEA.2013.6566458
  9. K. Tian, J. Xia, J. Qi, S. Ma, F. Yang, and A. Zhang, "An Optimized p+Shielding 4H-SiC Trench Gate MOSFETs Structure with Floating Regions," Materials Science Forum, Vol.954, pp.157-162, 2019. DOI: 10.4028/www.scientific.net/MSF.954.157
  10. S. Kyogoku, K. Tanaka, K. Ariyoshi, R. Lijima, Y. Kobayashi, and S. Harada, "Role of Trench Bottom Shielding Region on Switching Characteristics of 4H-SiC Double-Trench MOSFETs," Materials Science Forum, Vol.924, pp.748-751, 2018. DOI:10.4028/www.scientific.net/MSF.924.748
  11. O, Alatise, N. Parker-Allotey, M. Jennings, P. Mawby, I. Kennedy, G. Petkos, "Modeling the Impact of the Trench Depth on the Gate-Drain Capacitance in Power MOSFETs," IEEE Electron Device letters, Vol.32, pp.1269-1271, 2011. DOI: 10.1109/LED.2011.2159476
  12. R. S. Saxena and M. J. Kumar, "Dual-material-gate technique for enhanced trans conductance and breakdown voltage of trench power MOSFETs," IEEE Trans. Electron Devices, Vol.56, No.3, pp.517-522, 2009. DOI: 10.1109/TED.2008.2011723.
  13. L. Jiang, N. O. V. Plank, M. A. Blauw, R. Cheung, and E. van der Drift, "Dry etching of SiC in inductively coupled Cl2/Ar plasma," J. Phys. D, Appl. Phys., Vol.37, No.13, pp.1809-1814, 2004. DOI: 10.1088/0022-3727/37/13/012T.
  14. J. Wu, "DESIGN AND FABRICATION OF 4H SILICON CARBIDE MOSFETS," Ph.D, Rutgers University-New Brunswick, 2009.