• 설비공학논문집
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• 제30권1호
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• pp.1-9
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• 2018

Thermal performance of a heat sink for an inverter power stack was analyzed in terms of array and installation location of an Insulated Gate Bipolar Transistor (IGBT). Thermal flow around the heat sink was calculated with a numerical model that could simulate forced convection. Thermal performance was calculated depending on the array and location of high- and low-power IGBTs considering the maximum temperature of IGBT. The optimum array and installation location were found and causes were analyzed based on results of numerical analysis. For the numerical analysis, experiment design considered the installation location of IGBT, ratio of heat generation rates of high- and low-power IGBTs, and velocity of the inlet air as design variables. Based on numerical results, a correlation that could calculate thermal performance of the heat sink was suggested and the maximum temperature of the IGBT could be predicted depending on the installation method.

• 한국생산제조학회지
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• 제21권6호
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• pp.998-1002
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• 2012

This paper investigates the behavior of bubbles trapped in the in-mold coating (IMC) process. Silicon oil with different viscosity, 100, 150, 200, 300 and 400cps, was selected instead of the coating materials. To observe the flow front inside, a special mold was designed, where front plate was made of transparent material (acrylate). The overall size of front plate was $150mm{\times}120mm$. Mold gate location can be changed from up to down. Four heaters were used to investigate the effectiveness of temperature. The results show that silicon viscosity, mold gate location and mold temperature play an important role on the appearance of bubbles trapped in IMC process.

• 대한교통학회지
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• 제28권1호
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• pp.15-24
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• 2010

현재 지하철 출구의 위치 및 크기는 경험적이고 직관적인 판단 하에 지하철 출구의 보행량에 의해 결정되어지는 상황이며, 지하철 출구를 얼마나 많은 사람들이 이용할지에 대한 연구는 현재까지 이루어지지 않았다. 이에 본 연구에서는 지하철 출구 선택 모형을 구축하여 출구에 대한 이용수요를 예측하고자 한다. 지하철 출구의 가장 중요한 선택 요소라 함은 목적지라 할 수 있다. 이러한 목적지를 어떻게 계량화 할 것인가는 본 연구의 주된 연구 내용이다. 본 연구에서는 목적지를 계량화하기 위하여 역세권의 토지이용계획, 버스노선수, 역세권 공간구조(Space Syntax 기법의 Depth 개념, 역세권의 도로 연장 등) 등에 대한 기본적인 데이터를 이용하여 회귀분석 모형을 구축하였다. 모형 구축 결과 지하철 보행량은 토지이용 중 상업지역의 연상면적과 역세권 공간구조의 계량화 지표인 Total Depth, 버스노선수에 따라 큰 영향을 받는 것으로 분석되었다. 모형의 검증은 강남역과 양재역의 각 출구 보행량을 대상으로 수행하였으며, 이때 발생하는 출구 영향권 설정 문제에 관한 연구를 추가적으로 수행하였다. 연구결과 지하철 출구 선택이 어떠한 요소에 의해서 영향을 받는다는 것을 모형식을 통해 규명하였으며, 이를 통하여 향후 건설될 신규 지하철 역사에서의 출구 위치 및 크기 결정에 기여할 수 있는 기반을 마련하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.99-102
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• 1999

In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate signal delay, feed-through voltage and image sticking. To improve these problems which are caused by the fried-through voltage, we have evaluated new driving methods to reduce the fled-through voltage. Two level gate-pulse was used for the gate driving of the cst-on-common structure pixels. And two-gate line driving methods with the optimized gate signals were applied for the cst-on-gate structure pixels. These gate driving methods were better feed-through characteristics than conventional simple gate pulse. The evaluation of the suggested driving methods were performed by using a TFT-LCD array simulator PDAST which can simulate the gate, data and pixel voltages of a certain pixel at any time and at any location on a TFT array. The effect of the new driving method was effectively analyzed.

• Journal of information and communication convergence engineering
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• 제10권1호
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• pp.1-4
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• 2012

Given separated points divided by a line, called a wall, in a plane, we aim to make a gate in the wall to connect the separated points to each other. In this setting, the problem is to find a location for the gate that minimizes the average distance between the points. The problem is a variant of the well-known facility location problem, which is extensively studied in the fields of operations research, location theory, theoretical computer science, and so on. In this paper, we consider the $L^1$-distance of the points in the plane. The points are projected onto the wall and so the problem is transformed to a proximity problem of points on a line. Then it is shown that the transformed problem is related to the weighted median problem of points on the line. Therefore, we obtain an O(n log n)-time algorithm to solve our problem.

• Journal of Biosystems Engineering
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• 제34권2호
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• pp.95-105
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• 2009

A method was proposed which employed control of the drop location of fertilizer particles on a spinner disc to optimize the spread pattern uniformity. The system contained an optical sensor as a feedback mechanism, which measured discharge velocity and location, as well as particle diameters to predict a spread pattern of a single disc. Simulations showed that the feed gate adaptation algorithm produced high quality patterns for any given application rate in the dual disc spreader. The performance of the feed gate control method was assessed using data collected from a Sulky spinner disc spreader. The results showed that it was always possible to find a spread pattern with an acceptable CV lower than 15%, even though the spread pattern was obtained from a rudimentary flat disc with straight radial vanes. A mathematical optimization method was used to find the initial parameter settings for a specially designed experimental spreading arrangement, which included the feed gate control system, for a given flow rate and swath width. Several experiments were carried out to investigate the relationship between the gate opening and flow rate, disc speed and particle velocity, as well as disc speed and predicted landing location of fertilizer particles. All relationships found were highly linear ($r^2$ > 0.96), which showed that the time-of-flight sensor was well suited as a feedback sensor in the rate and uniformity controlled spreading system.

• 한국콘크리트학회:학술대회논문집
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• 한국콘크리트학회 2010년도 춘계 학술대회 제22권1호
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• pp.165-166
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• 2010

내부공사 및 유지관리 기간 중 발생 가능한 충돌시나리오를 설정하여 갑문 및 교각의 충돌해석 및 손상도를 구조해석 하였다. 또한, 충돌해석은 재료비선형을 고려하여 시간이력해석을 수행하였으며 충돌해석에서 교각에 전달되는 충돌하중을 산정하여 구조해석한 후 손상도를 평가하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1809-1811
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• 1999

In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate delay, feed-through voltage and image sticking. Gate delay is one of the biggest limiting factors for large-screen-size, high-resolution thin-film transistor liquid crystal display (TFT/LCD) design. Many driving method proposed for TFT/LCD progress. Thus we developed gate driving signal generator. Since Pixel-Design Array Simulation Tool (PDAST) can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the driving signals of gate lines on the pixel operations can be effectively analyzed.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2003년도 춘계학술대회논문집
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• pp.363-370
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• 2003

Shrinkage of injection molded parts is different form operational conditions of injection molding such as injection temperature, injection pressure and mold temperature, and mold design such as gate size. It is also various for different resins which have crystalline structure or not. In this study part shrinkage was investigated for various operational condition and resins; PBT for crystalline polymer, and PC and PMMA for amorphous polymer was used in experiment. Crystalline polymer shows higher part shrinkage by about three times than amorphous polymer. Part shrinkage increased as injection temperature and mold temperature increased and injection pressure decreased. Part shrinkage decreased as gate size increased since the pressure delivery is mush easier for large gate size. Part shrinkage according to the gate location was that the position in the part with close to the gate showed large shrinkage and this phenomenon might be occurred by residual stress.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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• pp.321-324
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• 1998

Pixel-Design Array Simulation Tool(PDAST) was used to profoundly the gate signal distortion and pixel changing capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio, level-shift of the pixel voltage were simulated with varying the resis5tivity of the gate line material. The information obtained from this study could be utilized to design the larger area and finer image quality panel.