Simulations of Gate Driving Schemes for Large Size, High Quality TFT-LCD

대면적 고화질 TFT-LCD용 게이트 Driving에 관한 Simulation

  • Jung, Soon-Shin (School of Electronics and Electrical Engineering, Hongik Univ.) ;
  • Yun, Young-Jun (School of Electronics and Electrical Engineering, Hongik Univ.) ;
  • Kim, Tae-Hyung (School of Electronics and Electrical Engineering, Hongik Univ.) ;
  • Choi, Jong-Sun (School of Electronics and Electrical Engineering, Hongik Univ.)
  • 정순신 (홍익대학교 전자전기공학부) ;
  • 윤영준 (홍익대학교 전자전기공학부) ;
  • 김태형 (홍익대학교 전자전기공학부) ;
  • 최종선 (홍익대학교 전자전기공학부)
  • Published : 1999.07.19

Abstract

In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate delay, feed-through voltage and image sticking. Gate delay is one of the biggest limiting factors for large-screen-size, high-resolution thin-film transistor liquid crystal display (TFT/LCD) design. Many driving method proposed for TFT/LCD progress. Thus we developed gate driving signal generator. Since Pixel-Design Array Simulation Tool (PDAST) can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the driving signals of gate lines on the pixel operations can be effectively analyzed.

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