• Transactions on Electrical and Electronic Materials
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• v.16 no.3
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• pp.156-161
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• 2015

In this paper, we present simulation results obtained using SILVACO TCAD tools for a 3-D silicon on insulator (SOI) n-FinFET structure with a gate length of 8 nm at 300K. The effects of variations of the device’s key electrical parameters, such as threshold voltage, subthreshold slope, transconductance, drain induced barrier lowering, oncurrent, leakage current and on/off current ratio are presented and analyzed. We will also describe some simulation results related to the influence of the gate work function variations on the considered structure. These variations have a direct impact on the electrical device characteristics. The results show that the threshold voltage decreases when we reduce the gate metal work function Φ_m. As a consequence, the behavior of the leakage current improves with increased Φ_m. Therefore, the short channel effects in real 3-D FinFET structures can reasonably be controlled and improved by proper adjustment of the gate metal work function.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1301-1305
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• 2005

The performance of OTFT with $PVP-TiO_2$ composite, as a gate insulator, is reported, including the effect of surfactant for synthesizing the composite material. According to our investigation results, it was one of critical issues to prevent the aggregation of $PVP-TiO_2$ particles during the synthesis process. From this point of view, $PVP-TiO_2$ particles were treated using Tween80, as a surfactant, and we could reduce the aggregated $PVP-TiO_2$ clusters. As a result, the OTFT with the composite insulator showed the threshold voltage of about -8.3 V and the subthreshold slope of about 1.5 V/decade, which are the optimized properties compared to those of OTFTs with bare PVP, in this study. It is thought that these characteristic improvements are originated from the increase in the dielectric constant of the PVP-based insulator by compositing with high-k particles.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.278.1-278.1
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• 2014

Organic materials have been explored as the gate dielectric layers in thin film transistors (TFTs) of backplane devices for flexible display because of their inherent mechanical flexibility. However, those materials possess some disadvantages like low dielectric constant and thermal resistance, which might lead to high power consumption and instability. On the other hand, inorganic gate dielectrics show high dielectric constant despite their brittle property. In order to maintain advantages of both materials, it is essential to develop the alternative materials. In this work, we manufactured nanocomposite gate dielectrics composed of organic material and inorganic nanoparticle and integrated them into organic TFTs. For synthesis of nanocomposite gate dielectrics, polyimide (PI) was explored as the organic materials due to its superior thermal stability. Candidate nanoprticles (NPs) of halfnium oxide, titanium oxide and aluminium oxide were considered. In order to realize NP concentration dependent electrical characteristics, furthermore, we have synthesized the different types of nanocomposite gate dielectrics with varying ratio of each inorganic NPs. To analyze gate dielectric properties like the capacitance, metal-Insulator-metal (MIM) structures were prepared together with organic TFTs. The output and transfer characteristics of organic TFTs were monitored by using the semiconductor parameter analyzer (HP4145B), and capacitance and leakage current of MIM structures were measured by the LCR meter (B1500, Agilent). Effects of mechanical cyclic bending of 200,000 times and thermally heating at $400^{\circ}C$ for 1 hour were investigated to analyze mechanical and thermal stability of nanocomposite gate dielectrics. The results will be discussed in detail.

• Journal of the Semiconductor & Display Technology
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• v.6 no.4
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• pp.69-73
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• 2007

The MIM(metal-insulator-metal) capacitors with the Al/PMMA/ITO/Glass structures were manufactured according to various PMMA concentration of 1, 2, 4, 6, 8 wt%. The lowest leakage current and the largest capacitance were found to be 2.3 pA and 1.2 nF, respectively, for the device with 2 wt% PMMA concentration. The measured capacitance of the devices was almost same values with the calculated one. The optimum film thickness was obtained at the value of 48 nm, showing that the capacitance and leakage current were 1.92 nF, 0.3 pA at 2 wt%, respectively. From this experiment, the PMMA gate insulator films can be applicable to the organic thin film transistors.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.4 s.37
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• pp.359-363
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• 2005

The organic insulation devices with MIM (metal-insulator-metal) structures as PVP gate insulation films were prepared for the application of organic thin film transistors (OTFT). The co-polymer organic insulation films were synthesized by using PVP(poly-4-vinylphenol) as solute and PGMEA (propylene glycol monomethyl ether acetate) as solvent. The cross-linked PVP insulation films were also prepared by addition of poly (melamine-co-formaldehyde) as thermal hardener. The leakage current of the cross-linked PVP films was found to be about 300 pA with low current noise. and showed better property in electrical properties as compared with the co-polymer PVP insulation films. In addition, cross-linked PVP insulation films showed better surface morphology (roughness), showing about 0.11${\~}$0.18 nF in capacitance for all PVP film samples.

• Journal of Adhesion and Interface
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• v.22 no.4
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• pp.144-152
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• 2021

Understanding charge transfer across the interface between organic semiconductor and gate insulator gives insight into the development of high-performance organic memory as well as highly stable organic field-effect transistors (OFETs). In this work, we firstly unveil a novel interfacial charge transfer mechanism, in which hole transfer from organic semiconductor to polymer insulator was nonlinearly boosted by localized states coupling. For this, OFETs based on rubrene single crystal semiconductor and Mylar gate insulator were fabricated via vacuum lamination, which allows stable repetition of lamination and delamination between semiconductor and gate insulator. The surfaces of rubrene single crystal and Mylar film were selectively degraded by photo-induced oxygen diffusion and UV-ozone treatment, respectively. Consequently, we found that the interfacial charge transfer and resultant bias-stress effect were nonlinearly boosted by coupling between localized states in rubrene and Mylar. In particular, the small number of localized states in rubrene single crystal provided fluent pathway for interfacial charge transport.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.104-104
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• 2009

Critical dimensions has rapidly shrunk to increase the degree of integration and to reduce the power consumption. However, it is accompanied with several problems like direct tunneling through the gate insulator layer and the low conductivity characteristic of poly-silicon. To cover these faults, the study of new materials is urgently needed. Recently, high dielectric materials like $Al_2O_3$, $ZrO_2$ and $HfO_2$ are being studied for equivalent oxide thickness (EOT). However, poly-silicon gate is not compatible with high-k materials for gate-insulator. To integrate high-k gate dielectric materials in nano-scale devices, metal gate electrodes are expected to be used in the future. Currently, metal gate electrode materials like TiN, TaN, and WN are being widely studied for next-generation nano-scale devices. The TaN gate electrode for metal/high-k gate stack is compatible with high-k materials. According to this trend, the study about dry etching technology of the TaN film is needed. In this study, we investigated the etch mechanism of the TaN thin film in an inductively coupled plasma (ICP) system with $O_2/BCl_3/Ar$ gas chemistry. The etch rates and selectivities of TaN thin films were investigated in terms of the gas mixing ratio, the RF power, the DC-bias voltage, and the process pressure. The characteristics of the plasma were estimated using optical emission spectroscopy (OES). The surface reactions after etching were investigated using X-ray photoelectron spectroscopy (XPS) and auger electron spectroscopy (AES).

• Proceedings of the Korean Society of Potoscience Conference
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• 2006.06a
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• pp.38-38
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• 2006

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.5
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• pp.1-5
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• 2011

In this paper, we optimize the gate field plate structure to improve breakdown characteristics of AlGaN/GaN HEMT by two-dimensional device simulator. We have simulated using three parameters such as field-plate length, types of insulator, and insulator thickness and thereby we checked change of the electric field distribution and breakdown voltage characteristics. As optimizing field-plate structure, electric fields concentrated near the gate edge and field-plate edge are effectively dispersed. Therefore, avalanche effect is decresed, so breakdown voltage characteristic is increased. As a result breakdown characteristics of optimized gate field-plate structure are increased by about 300% compared to those of the standard structure.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1466-1469
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• 2008

We have fabricated 2.5 inch QQCIF AM-OLED panel driven by ZnO-TFT on a plastic substrate for the first time. The number of photo mask for the whole panel process was 5 and the TFT structure was top gate with active protection layer as a first gate insulator. Optimizing the process for the substrate buffer layer, active layer, ZnO protection layer, and gate insulator was key factor to achieve the TFT performance enough to drive OLED. The ZnO TFT has mobility of $5.4\;cm^2/V.s$, turn on voltage of -6.8 V, sub-threshold swing of 0.39 V/decade, and on/off ratio of $1.7{\times}10^9$. Although whole process temperature is below $150^{\circ}C$ to be suitable for the plastic substrate, performance of ZnO TFT was comparable to that fabricated at higher temperature on the glass.