• Title/Summary/Keyword: Gate Driver

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Driving Methods of LCD-TV Using a-Si:H TFT Integrated Gate Drivers

  • Lee, Chang-Soo;Lee, Min-Cheol;Lee, Yong-Soon;Bae, Yu-Han;Kim, Young-Su;Moon, Seung-Hwan;Kim, Nam-Deog;Kim, Sang-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.280-283
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    • 2008
  • LCD-TV applications were successfully implemented using integrated gate drivers. Integrated gate drivers have been implemented on a HD panel for 60Hz operation and on a FHD panel for 120Hz operation. It is found that the integrated gate driver reduces the flicker of a panel.

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Data Line Sharing in TFT-LCD with the Integrated Gate Driver

  • Park, Kwon-Shik;Cho, Nam-Wook;Chun, Min-Doo;Moon, Tae-Woong;Jang, Yong-Ho;Kim, Hea-Yeol;Kim, Binn;Choi, Seung-Chan;Cho, Hyung-Nyuck;Ryoo, Chang-Il;Yoon, Soo-Young;Kim, Chang-Dong;Kang, In-Byeong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1009-1012
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    • 2008
  • We have succeeded in producing the world $1^{st}$ TFT LCD panel adapting the data line sharing method. In the data line sharing structure, two neighboring pixels share one data line. We also adapted time shared data driving with a-Si TFT based circuit integration technology of LG Display's own. By using these technologies, we can reduce the number of source driver ICs by half, compared to that of the existing gate driver integrated TFT LCD panel.

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Stability of Hydrogenated Amorphous Silicon TFT Driver

  • Bae, Byung-Seong;Choi, Jae-Won;Oh, Jae-Hwan;Kim, Kyu-Man;Jang, Jin
    • Journal of Information Display
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    • v.6 no.1
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    • pp.12-16
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    • 2005
  • Gate and data drivers are essential for driving active matrix display. In this study, we integrate drivers with a-Si:H to develop a compact, better reliability and cost effective display. We design and fabricate drivers with conventional a-Si:H thin film transistors (TFTs). The output voltages are investigated according to the input voltage, temperature and operation time. Based on these studies, we propose here a new driver to prevent gate line from the floated state. For the external coupled voltage fluctuation, the proposed driver shows better stability.

Floating Power Supply Based on Bootstrap Operation for Three-Level Neutral-Point-Clamped Voltage-Source Inverter

  • Nguyen, Qui Tu Vo;Lee, Dong-Choon
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.3-4
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    • 2011
  • This paper presents a survey of floating power supply based on bootstrap operation for three-level voltage-source inverters. The floating power supply for upper switches is achieved by the bootstrap capacitor charged during on-time of the switch underneath. Hence, a large number of bulky isolated DC/DC power supplies for each gate driver are reduced. The Pspice simulation results show the behavior of bootstrap devices and the performance of bootstrap capacitor voltage.

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A Fast-Switching Current-Pulse Driver for LED Backlight (LED 백라이트를 위한 고속 스위칭 전류-펄스 드라이버)

  • Yang, Byung-Do;Lee, Yong-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.7
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    • pp.39-46
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    • 2009
  • A fast-switching current-pulse driver for light emitting diode (LED) backlight is proposed. It uses a regulated drain current mirror (RD-CM) [1] and a high-voltage NMOS transistor (HV-NMOS). It achieves the fast-response current-pulse switching by using a dynamic gain-boosting amplifier (DGB-AMP). The DGB-AMP does not discharge the large HV-NMOS gate capacitance of the RD-CM when the output current switch turns off. Therefore, it does not need to charge the HV-NMOS gate capacitance when the switch turns on. The proposed current-pulse driver achieves the fast current switching by removing the repetitive gate discharging and charging. Simulation results were verified with measurements performed on a fabricated chip using a 5V/40V 0.5um BCD process. It reduces the switching delay to 360ns from 700ns of the conventional current-pulse driver.

Design of a Robust Half-bridge Driver IC to a Variation of Process and Power Supply (공정 및 공급전압 변화에 강인한 하프브리지 구동 IC의 설계)

  • Song, Ki-Nam;Kim, Hyoung-Woo;Kim, Ki-Hyun;Seo, Kil-Soo;Jang, Kyung-Oun;Han, Seok-Bung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.10
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    • pp.801-807
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    • 2009
  • In this paper, we propose a novel shoot-through protection circuit and pulse generator for half-bridge driver IC. We designed a robust half-bridge driver IC over a variation of processes and power supplies. The proposed circuit is composed a delay circuit using a beta-multiplier reference. The proposed circuit has a lower variation rate of dead time and pulse-width over variation of processes and supply voltages than the conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also, the proposed pulse generator is prevented from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, respectively. The variation ratio is 68%(170 ns) of maximum over variation of processes and supply voltages. The proposed circuit is designed using $1\;{\mu}m$ 650 V BCD (Bipolar, CMOS, DMOS) process parameter, and the simulations are carried out using Spectre simulator of Cadence corporation.

a-Si TFT Integrated Gate Driver Using Multi-thread Driving

  • Jang, Yong-Ho;Yoon, Soo-Young;Park, Kwon-Shik;Kim, Hae-Yeol;Kim, Binn;Chun, Min-Doo;Cho, Hyung-Nyuck;Choi, Seung-Chan;Moon, Tae-Woong;Ryoo, Chang-Il;Cho, Nam-Wook;Jo, Sung-Hak;Kim, Chang-Dong;Chung, In-Jae
    • Journal of Information Display
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    • v.7 no.3
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    • pp.5-8
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    • 2006
  • A novel a-Si TFT integrated gate driver circuit using multi-thread driving has been developed. The circuit consists of two independent shift registers alternating between the two modes, "wake" and "sleep". The degradation of the circuit is retarded because the bias stress is removed during the sleep mode. It has been successfully integrated in 14.1-in. XGA LCD Panel, showing enhanced stability.

High Current Behavior and Double Snapback Mechanism Analysis of Gate Grounded Extended Drain NMOS Device for ESD Protection Device Application of DDIC Chip (DDIC 칩의 정전기 보호 소자로 적용되는 GG_EDNMOS 소자의 고전류 특성 및 더블 스냅백 메커니즘 분석)

  • Yang, Jun-Won;Kim, Hyung-Ho;Seo, Yong-Jin
    • Journal of Satellite, Information and Communications
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    • v.8 no.2
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    • pp.36-43
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    • 2013
  • In this study, the high current behaviors and double snapback mechanism of gate grounded_extended drain n-type MOSFET(GG_EDNMOS) device were analyzed in order to realize the robust electrostatic discharge(ESD) protection performances of high voltage operating display driver IC(DDIC) chips. Both the transmission line pulse(TLP) data and the thermal incorporated 2-dimensional simulation analysis as a function of ion implant conditions demonstrate a characteristic double snapback phenomenon after triggering of bipolar junction transistor(BJT) operation. Also, the background carrier density is proven to be a critical factor to affect the high current behavior of the GG_EDNMOS devices.

High-Performance Metal-Substrate Power Module for Electrical Applications

  • Kim, Jongdae;Oh, Jimin;Yang, Yilsuk
    • ETRI Journal
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    • v.38 no.4
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    • pp.645-653
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    • 2016
  • This paper demonstrates the performance of a metal-substrate power module with multiple fabricated chips for a high current electrical application, and evaluates the proposed module using a 1.5-kW sinusoidal brushless direct current (BLDC) motor. Specifically, the power module has a hybrid structure employing a single-layer heat-sink extensible metal board (Al board). A fabricated motor driver IC and trench gate DMOSFET (TDMOSFET) are implemented on the Al board, and the proper heat-sink size was designed under the operating conditions. The fabricated motor driver IC mainly operates as a speed controller under various load conditions, and as a multi-phase gate driver using an N-ch silicon MOSFET high-side drive scheme. A fabricated power TDMOSFET is also included in the fabricated power module for three-phase inverter operation. Using this proposed module, a BLDC motor is operated and evaluated under various pulse load tests, and our module is compared with a commercial MOSFET module in terms of the system efficiency and input current.

Increase the reliability of the gate driver for amorphous TFT displays

  • Wu, Bo-Cang;Shiau, Miin-Shyue;Wu, Hong-Chong;Liu, Don-Gey
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1301-1304
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    • 2008
  • In this study, we used a multiple phase scheme for the clock in the dual-pull-down driver for TFT display panels. In this scheme, the turn-on time for the transistors in the dual-pull-down structure was reduced from 1/2 to 1/4 or 1/8 of the period cycle time. While keeping proper operation of the transistor size of circuit was fine tuned to achieve an optimal performance. The relation between the active time and the transistor dimensions was obtained for the optimal design.

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