• 한국정밀공학회지
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• 제24권12호
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• pp.65-73
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• 2007

In this paper, the gain scheduled state feedback and disturbance feedforward control design proposed in the previous paper has been applied to a simple matching system and a turret stabilization system. In such systems, it is needed to attenuate disturbance response effectively as long as control input satisfies the given constraint on its magnitude. The scheduled control gains are derived in the framework of linear matrix inequality(LMI) optimization by means of the MatLab toolbox. Its effectiveness is verified along with the simulation results compared with the conventional optimum constant gain control and the scheduled state feedback control cases.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.818-823
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• 2014

A high-gain wideband low noise amplifier (LNA) using $0.25-{\mu}m$ Gallium-Nitride (GaN) MMIC technology is presented. The LNA shows 8 GHz to 15 GHz operation by a distributed amplifier architecture and high gain with an additional common source amplifier as a mid-stage. The measurement results show a flat gain of $25.1{\pm}0.8dB$ and input and output matching of -12 dB for all targeted frequencies. The measured minimum noise figure is 2.8 dB at 12.6 GHz and below 3.6 dB across all frequencies. It consumes 98 mA with a 10-V supply. By adjusting the gate voltage of the mid-stage common source amplifier, the overall gain is controlled stably from 13 dB to 24 dB with no significant variations of the input and output matching.

• 한국통신학회논문지
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• 제22권5호
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• pp.974-980
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• 1997

The 23GHz 1-state LNA was designed by using MPIE numerical analysis and conventional design EEsof softwares. The circuit was designed using conventional tools but analyzed and modified by using numerical MPIE tools. he matching sections was designed with parallel coupled filter-type, which gives impedance matching and DC blocking and has small discontinuities. THe FET chip is directly attached to the graound metal. The designed LNA gives 5.8dB gain and 2.5dB noise figure withoug considering the loss and impedance shift of connectors that degenerate the gain and noise figure considerably. this results gives very promising characteristics for our design process and matching schemes and fabrication technologies.

• 한국통신학회논문지
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• 제12권1호
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• pp.19-26
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• 1987

Potentially unstable한 GaAs FET를 사용하여 3~4GHz에서 평탄한 이득특성을 갖는 광대역 초고주파 증폭기를 설계하였다. 입력정합회로는 유용전력이득이 14dB인 원을 사용하여 안정한 영역에 존재하도록 설계하였다. 출력정합회로는 최대전력이 전달되고 또한 안정한 영역에 존재하도록 Fano의 대역통과 정합이론을 사용하여 설계하였다. 전송 전력이득 및 $S_11$과 $S_22$의 실험치는 이론치와 거의 유사한 특성을 나타내었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권2호
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• pp.125-131
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• 2002

This paper presents MMIC drive and power amplifiers covering 6-18 ㎓. For simple wideband impedance matching and less sensitivity to fabrication variation, modified distributed topologies are employed in the both amplifiers. Cascade amplifiers with a self-biasing circuit through feedback resistors are used as unit gain blocks in the drive amplifier, resulting in high gain, high stability, and compact chip size. Self impedance matching and high-pass, low-pass impedance matching networks are used in the power amplifier. In measured results, the drive amplifier showed good return losses ($S_11,{\;}S_{22}{\;}<{\;}-10.5{\;}dB$), gain flatness ($S_{21}={\;}16{\;}{\pm}0.6{\;}dB$), and $P_{1dB}{\;}>{\;}22{\;}dBm$ over 6-18 GHz. The power amplifier showed $P_{1dB}{\;}>{\;}28.8{\;}dBm$ and $P_{sat}{\;}{\approx}{\;}30.0{\;}dBm$ with good small signal characteristics ($S_{11}<-10{\;}dB,{\;}S_{22}{\;}<{\;}-6{\;}dB,{\;}and{\;}S_{21}={\;}18.5{\;}{\pm}{\;}1.25{\;}dB$) over 6-18 GHz.

• 한국정밀공학회지
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• 제17권8호
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• pp.126-133
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• 2000

This paper is a study on robust PID controller tuning technique using the frequency region model matching method.To design the robust PID controller satisfying disturbance attenuation and robust tracking property for a reference input first an {{{{ETA _$\infty$}}}} controller satisfying given performances is designed using an H$_{\infty}$ control method, And then the parameters(proportional gain integral gain and derivation gain) of the robust PID controller with the performances of the desinged H$_{\infty}$ controller are determined using the model matching method at frequency domain. in this paper this PID controller tuning technique is applied to PID speed controller design for BLDC motors. Consequently simulation results show that the proposed PID speed controller satisfies load torque disturbance attenuation and robust tracking property and this study has usefulness and applicability for the speed control system; design of BLDC motors.

• 한국정보통신학회논문지
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• 제7권3호
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• pp.485-491
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• 2003

본 논문에서는 디지털 위성방송 지상 리피터에 적용하고자 고 이득 저 잡음특성을 갖는 소형 채널증폭기를 설계하였다. 채널증폭기를 설계함에 있어서 각각의 증폭 단에서의 잡음지수와 이득 및 안정도를 서로 절충하여 최적화 시켰다. 채널증폭기는 첫째 단에서 저 잡음특성을 나타내도록 임피던스를 정합시켰으며 둘째 단 이상에서는 균일한 이득과 고 안정 동작상태를 유지하고 최종 출력 단에서 고 이득특성을 나타내었다. 설계된 6단의 고 이득 저잡음특성을 나타내는 채널증폭기에 대하여 디지털 위성방송 지상주파수 11.7GHz∼12.7GHz의 대역에서 실험한 결과 68dB의 증폭이득과 2.4dB의 잡음지수를 나타내었으며 63dB의 동작범위를 나타내어 위성방송 지상리피터용 채널증폭기에 적용할 수 있음을 확인하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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• pp.193-194
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• 2007

This paper presents the design of a power amplifier for full-band UWB application systems using a CMOS 0..18um technology. A wideband RLC filter and a multilevel RLC matching scheme are utilized to achieve the wideband input/output matching. Both the cascade and cascode stage are used to increase the gain and to achieve gain flatness. Simulation results show that the designed amplifier provides a power gain greater than 10 dB throughout the UWB full-band(3.1-10.6GHz) and an input P1dB of -1.2dBm at 6.9GHz. It consumes 35.8mW from a 1.8V supply.

• Journal of Communications and Networks
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• 제14권3호
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• pp.257-266
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• 2012

A decode-and-forward two-way relay system benefits from orthogonal frequency division multiplexing (OFDM) and relay transmission. In this paper, we consider a decode-and-forward two-way relay system over OFDMwith two strategies: A joint subcarrier matching algorithm and a power allocation algorithm operating with a total power constraint for all subcarriers. The two strategies are studied based on average capacity using numerical analysis by uniformly allocating power constraints for each subcarrier matching group. An optimal subcarrier matching algorithm is proposed to match subcarriers in order of channel power gain for both transmission sides. Power allocation is defined based on equally distributing the capacity of each hop in each matching group. Afterward, a modified water-filling algorithm is also considered to allocate the power among all matching groups in order to increase the overall capacity of the network. Finally, Monte Carlo simulations are completed to confirm the numerical results and show the advantages of the joint subcarrier matching, power allocation and water filling algorithms, respectively.

• ETRI Journal
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• 제27권5호
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• pp.569-578
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• 2005

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.