Design of a $3.1{\sim}10.6GHz$ CMOS Power Amplifier for UWB Application

UWB 응용을 위한 $3.1{\sim}10.6GHz$ CMOS 전력증폭기 설계

  • Park, J.K. (Dept. of Electronic Engineering, University of Incheon) ;
  • Shim, S.M. (Dept. of Electronic Engineering, University of Incheon) ;
  • Park, J.T. (Dept. of Electronic Engineering, University of Incheon) ;
  • Yu, C.G. (Dept. of Electronic Engineering, University of Incheon)
  • Published : 2007.10.26

Abstract

This paper presents the design of a power amplifier for full-band UWB application systems using a CMOS 0..18um technology. A wideband RLC filter and a multilevel RLC matching scheme are utilized to achieve the wideband input/output matching. Both the cascade and cascode stage are used to increase the gain and to achieve gain flatness. Simulation results show that the designed amplifier provides a power gain greater than 10 dB throughout the UWB full-band(3.1-10.6GHz) and an input P1dB of -1.2dBm at 6.9GHz. It consumes 35.8mW from a 1.8V supply.

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