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Growth mechanism of InP and InP/ZnS synthesis using colloidal synthesis (반응 용기법을 이용한 InP/ZnS 양자점 합성과정에서 InP 코어의 성장기구)

  • Seo, Han wook;Jeong, Da-woon;Lee, Bin;Hyun, Seoung kyun;Kim, Bum Sung
    • Journal of Powder Materials
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    • v.24 no.1
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    • pp.6-10
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    • 2017
  • This study investigates the main growth mechanism of InP during InP/ZnS reaction of quantum dots (QDs). The size of the InP core, considering a synthesis time of 1-30 min, increased from the initial 2.56 nm to 3.97 nm. As a result of applying the proposed particle growth model, the migration mechanism, with time index 7, was found to be the main reaction. In addition, after the removal of unreacted In and P precursors from bath, further InP growth (of up to 4.19 nm (5%)), was observed when ZnS was added. The full width at half maximum (FWHM) of the synthesized InP/ZnS quantum dots was found to be relatively uniform, measuring about 59 nm. However, kinetic growth mechanism provides limited information for InP / ZnS core shell QDs, because the surface state of InP changes with reaction time. Further study is necessary, in order to clearly determine the kinetic growth mechanism of InP / ZnS core shell QDs.

Effect of Harvest Date on Fruit Quality and Core Breakdown of 'Wonhwang' Pears (수확시기에 따른 '원황' 배 과실의 품질과 과심갈변에 미치는 영향)

  • Choi, Jin-Ho;Yim, Sun-Hee;Kim, Sung-Jong;Lee, Han-Chan;Kwon, Yong-Hee;Park, Yong-Seo;Jung, Seok-Kyu;Choi, Hyun-Sug
    • Korean Journal of Organic Agriculture
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    • v.23 no.1
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    • pp.103-112
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    • 2015
  • This study was conducted on how the harvest time affect fruit quality, core breakdown, and taste of GA-pasted 'Wonhwang' pear (Pyrus pyrifolia Nakai) fruit in order to verify the optimum harvest time. Harvest time included 110, 115, 120, 125, 130 days after full bloom (DAFB). Delayed fruit harvest increased fruit weight and content of soluble solids but decreased firmness, titratable acidity, and starch content. Harvest at 130 DAFB severely reduced fruit firmness and increased fruit core breakdown for 21 days at room storage, while harvest at 115 DAFB showed the opposite result of the fruit firmness and breakdown. Delayed fruit harvest reduced fruit taste, regardless of GA pasting on fruit. GA-pasted fruit showed reduced taste in advance compared to those of non GA-pasted fruit, regardless of the harvest time. Harvest at 120 DAFB would be suitable to maintain fruit quality and reduce core breakdown.

A module generator for variable-precision multiplier core with error compensation for low-power DSP applications (저전력 DSP 응용을 위한 오차보상을 갖는 가변 정밀도 승산기 코어 생성기)

  • Hwang, Seok-Ki;Lee, Jin-Woo;Shin, Kyung-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.2A
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    • pp.129-136
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    • 2005
  • A multiplier generator, VPM_Gen (Variable-Precision Multiplier Generator), which generates Verilog-HDL models of multiplier cores with user-defined bit-width specification, is described. The bit-widths of operands are parameterized in the range of $8-bit{\sim}32-bit$ with 1-bit step, and the product from multiplier core can be truncated in the range of $8-bit{\sim}64-bit$ with 2-bit step, resulting that the VPM_Gen can generate 3,455 multiplier cores. In the case of truncating multiplier output, by eliminating the circuits corresponding to the truncation part, the gate counts and power dissipation can be reduced by about 40% and 30%, respectively, compared with full-precision multiplier. As a result, an area-efficient and low-power multiplier core can be obtained. To minimize truncation error, an adaptive error-compensation method considering the number of truncation bits is employed. The multiplier cores generated by VPM_Gen have been verified using Xilinx FFGA board and logic analyzer.

A full-Hardwired Low-Power MPEG4@SP Video Encoder for Mobile Applications (모바일 향 저전력 동영상 압축을 위한 고집적 MPEG4@SP 동영상 압축기)

  • Shin, Sun Young;Park, Hyun Sang
    • Journal of Broadcast Engineering
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    • v.10 no.3
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    • pp.392-400
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    • 2005
  • Highly integrated MPEG-4@SP video compression engine, VideoCore, is proposed for mobile application. The primary components of video compression require the high memory bandwidth since they access the external memory frequently. They include motion estimation, motion compensation, quantization, discrete cosine transform, variable length coding, and so on. The motion estimation processor adopted in VideoCore utilizes the small-size local memories such that the video compression system accesses external memory as less frequently as possible. The entire video compression system is divided into two distinct sub-systems: the integer-unit motion estimation part and the others, and both operate concurrently in a pipelined architecture. Thus the VideoCore enables the real-time high-quality video compression with a relatively low operation frequency.

Synthesis of Core/Shell Graphene/Semiconductor Nanostructures for Lithium Ion Battery Anodes

  • Sin, Yong-Seung;Jang, Hyeon-Sik;Im, Jae-Yeong;Im, Se-Yun;Lee, Jong-Un;Lee, Jae-Hyeon;Wang, Junyi;Heo, Geun;Kim, Tae-Geun;Hwang, Seong-U;Hwang, Dong-Mok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.288-288
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    • 2013
  • Lithium-ion battery (LIB) is one of the most important rechargeable battery and portable energy storage for the electric digital devices. In particular, study about the higher energy capacity and longer cycle life is intensively studied because of applications in mobile electronics and electric vehicles. Generally, the LIB's capacity can be improved by replacing anode materials with high capacitance. The graphite, common anode materials, has a good cyclability but shows limitations of capacity (~374 mAh/g). On the contrary, silicon (Si) and germanium(Ge), which is same group elements, are promising candidate for high-performance LIB electrodes because it has a higher theoretical specific capacity. (Si:4200 mAh/g, Ge:1600 mAh/g) However, it is well known that Si volume change by 400% upon full lithiation (lithium insertion into Si), which result in a mechanical pulverization and poor capacity retention during cycling. Therefore, variety of nanostructure group IV elements, including nanoparticles, nanowires, and hollow nanospheres, can be promising solution about the critical issues associated with the large volume change. However, the fundamental research about correlation between the composition and structure for LIB anode is not studied yet. Herein, we successfully synthesized various structure of nanowire such as Si-Ge, Ge-Carbon and Si-graphene core-shell types and analyzed the properties of LIB. Nanowires (NWs) were grown on stainless steel substrates using Au catalyst via VLS (Vapor Liquid Solid) mechanism. And, core-shell NWs were grown by VS (Vapor-Solid) process on the surface of NWs. In order to characterize it, we used FE-SEM, HR-TEM, and Raman spectroscopy. We measured battery property of various nanostructures for checking the capacity and cyclability by cell-tester.

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Jacobian-free Newton Krylov two-node coarse mesh finite difference based on nodal expansion method

  • Zhou, Xiafeng
    • Nuclear Engineering and Technology
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    • v.54 no.8
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    • pp.3059-3072
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    • 2022
  • A Jacobian-Free Newton Krylov Two-Nodal Coarse Mesh Finite Difference algorithm based on Nodal Expansion Method (NEM_TNCMFD_JFNK) is successfully developed and proposed to solve the three-dimensional (3D) and multi-group reactor physics models. In the NEM_TNCMFD_JFNK method, the efficient JFNK method with the Modified Incomplete LU (MILU) preconditioner is integrated and applied into the discrete systems of the NEM-based two-node CMFD method by constructing the residual functions of only the nodal average fluxes and the eigenvalue. All the nonlinear corrective nodal coupling coefficients are updated on the basis of two-nodal NEM formulation including the discontinuity factor in every few newton steps. All the expansion coefficients and interface currents of the two-node NEM need not be chosen as the solution variables to evaluate the residual functions of the NEM_TNCMFD_JFNK method, therefore, the NEM_TNCMFD_JFNK method can greatly reduce the number of solution variables and the computational cost compared with the JFNK based on the conventional NEM. Finally the NEM_TNCMFD_JFNK code is developed and then analyzed by simulating the representative PWR MOX/UO2 core benchmark, the popular NEACRP 3D core benchmark and the complicated full-core pin-by-pin homogenous core model. Numerical solutions show that the proposed NEM_TNCMFD_JFNK method with the MILU preconditioner has the good numerical accuracy and can obtain higher computational efficiency than the NEM-based two-node CMFD algorithm with the power method in the outer iteration and the Krylov method using the MILU preconditioner in the inner iteration, which indicates the NEM_TNCMFD_JFNK method can serve as a potential and efficient numerical tool for reactor neutron diffusion analysis module in the JFNK-based multiphysics coupling application.

Impact of axial power distribution on thermal-hydraulic characteristics for thermionic reactor

  • Dai, Zhiwen;Wang, Chenglong;Zhang, Dalin;Tian, Wenxi;Qiu, Suizheng;Su, G.H.
    • Nuclear Engineering and Technology
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    • v.53 no.12
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    • pp.3910-3917
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    • 2021
  • Reactor fuel's power distribution plays a vital role in designing the new generation thermionic Space Reactor Power Systems (SRPS). In this paper, the 1/12th SPACE-R's full reactor core was numerically analyzed with two kinds of different axial power distribution, to identify their impacts on thermal-hydraulic and thermoelectric characteristics. In the benchmark study, the maximum error between numerical results and existing data or design values ranged from 0.2 to 2.2%. Four main conclusions were obtained in the numerical analysis: a) The axial power distribution has less impact on coolant temperature. b) Axial power distribution influenced the emitter temperature distribution a lot, when the core power was cosine distributed, the maximum temperature of the emitter was 194 K higher than that of the uniform power distribution. c) Comparing to the cosine axial power distribution, the uniform axial power distribution would make the maximum temperature in each component of the reactor core much lower, reducing the requirements for core fuel material. d) Voltage and current distribution were similar to the axial electrode temperature distribution, and the axial power distribution has little effect on the output power.

A Design of Full-wave Rectifier for Measurement Instrument (계측기용 새로운 전파정류 회로 설계)

  • Bae Sung-Hoon;Lim Shin-Il
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.43 no.4 s.310
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    • pp.53-59
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    • 2006
  • This paper describes the new design technique of full wave rectifier (FWR) for precise measurement instrument and the chip implementation of this FWR circuit with measurement results. Conventional circuits have some problems of complex design and limited output range( $VDD/2{\sim}VLIIV1IT+$). Proposed FWR circuit was simply designed with two 2x1 MUXs, one high speed comparator, and one differential difference amplifier(DDA). One rail-to-rail differential difference amplifier(DDA) performs the DC level shifting to VSS and 2X amplification simultaneously, and enables the full range ($Vss{\sim}VDD$) operation. The proposed FWR circuits shows more than 50% reduction of chip area and power consumption compared to conventional one. Proposed circuit was implemented with 0.35um 1-poly 2-metal CMOS process. Core size is $150um{\times}450um$ and power dissipation is 840uW with 3.3V single supply.

An Efficient Test Method for a Full-Custom Design of a High-Speed Binary Multiplier (풀커스텀 (full-custom) 고속 곱셈기 회로의 효율적인 테스트 방안)

  • Moon, San-Gook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.10a
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    • pp.830-833
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    • 2007
  • In this paper, we implemented a $17{\times}17b$ binary digital multiplier using radix-4 Booth;s algorithmand proposed an efficient testing methodology for the full-custom design. A two-stage pipeline architecture was applied to achieve higher throughput and 4:2 adders were used for regular layout structure in the Wallace tree partition. Several chips were fabricated using LG Semicon 0.6-um 3-Metal N-well CMOS technology. We did fault simulations efficiently using the proposed test method resulting in the reduction of the number of faulty nodes by 88%. The chip contains 9115 transistors and the core area occupies $1135^*1545$ mm2. The functional tests using ATS-2 tester showed that it can operate with 24 MHz clock at 5.0 V at room temperature.

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The Research on Constructing Networks into Clusters;Focusing on the networks that support the growth of an enterprise (클러스터 내 성장지원 네트워크 구축에 관한 실증연구;대덕 첨단클러스터 성장지원 네트워크 중심으로)

  • Park, Chang-Hyeon;Park, Jun-Byung
    • Asia-Pacific Journal of Business Venturing and Entrepreneurship
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    • v.2 no.4
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    • pp.19-41
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    • 2007
  • This research has a goal which is suggesting the way of constructing 'Cluster' which mean scheming the commencement of an enterprise in an early stage. Now it is reorganized into a IT industry structure 'Time-to market growth' is burst as a big issue. in that point, this research analyze the core success factor which is drawing from the existing IT industrial complex, and then it will be used to draw up to the 'Idealistic growth-support Cluster' on the basis of it, we pulled out various issues about the Corporate in the early stage of its growth. Therefore, this research is focused on presenting the ideal network(net) by considering the Network that organizations and business in Cluster or the network including the factors linked organizations and business in Cluster. therefore, this research carried out three big analysis. from the case investigation we pulled out the core growth factor, and then we approached the analysis of net structure for making application to Network Analysis. and then we analyzed that the characteristics of the Network after measuring by on the basis of analyzing core growth factor. and especailly, this research carried out the Core analysis for recognition of Core- support-frame by base Centrality Test on the net which is composed of growth support organizations at each Business. Judging from this, we can help to make full use of resources for the network analysis in Cluster and establish the Network Strategy by Structure comparison between the structure of industry-Cluster and ideal Business-support networks on the basis of the analysis from the Core-success-factor

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