• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.8
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• pp.1464-1469
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• 2008

A CMOS Gm-C filter with variable cutoff frequency applicable for using in the direct conversion receiver is designed. The designed filter comprises the CMOS differential transconductors, and the gm of the transconductor is controlled by the bias voltage. This configuration can compensate variant of the cutoff frequency which could be generated by external noises, and also be used in multiband receiver. As a results of HSPICE simulation, the control range of the cutoff frequency is $1.5MHz{\sim}3.5MHz$ and the gain control range is $-2.8dB{\sim}2.6dB$. The layout of the designed 5th-order Elliptic low-pass filter is performed to fabricate a chip using $2.5V-0.25{\mu}m$ CMOS processing parameter.

• Journal of electromagnetic engineering and science
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• v.14 no.1
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• pp.25-30
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• 2014

This paper discusses the design of a high frequency Greinacher voltage multiplier as rectifier; it has a greater conversion efficiency and higher output direct current (DC) voltage at high power compared to a simple halfwave rectifier. Multiple diodes in the Greinacher voltage multiplier with distributed circuits consume excited power to the rectifier equally, thereby increasing the overall power capacity of the rectifier system. The proposed rectifiers are a Greinacher voltage doubler and a Greinacher voltage quadrupler, which consist of only diodes and distributed circuits for high frequency applications. For each rectifier, the RF-to-DC conversion efficiency and output DC voltage for each input power and load resistance are analyzed for the maximum conversion efficiency. The input power with maximum conversion efficiency of the designed Greinacher voltage doubler and quadrupler is 3 and 7 dB higher, respectively;than that of the halfwave rectifier.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.921-924
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• 2005

We report low conversion loss and high LO to RF isolation 94 GHz MMIC resistive mixers based on 0.1 ${\mu}m$ InGaAs/InAlAs/GaAs metamorphic HEMT technology. The fabricated resistive mixers applied a one-stage amplifier on RF port of the mixer. By using the one-stage amplifier, we obtained the decrement of conversion loss and the increment of LO to RF isolation. So, we can obtain higher performances than conventional resistive mixers. The modified mixer shows excellent conversion loss of 6.7 dB at a LO power of 10 dBm. We also observed an extremely high isolation characteristic from the MMICs exhibiting the LO-RF isolation of 21 ${\pm}$ 0.5dB in a frequency range of 93.7${\sim}$ 94.3 GHz. The low conversion loss and high LO-RF isolation characteristics of the MMIC modified resistive mixers are mainly attributed to the performance of the MHEMTs exhibiting a maximum transconductance of 654 mS/mm, a current gain cut-off frequency of 173 GHz and a maximum oscillation frequency of 271 GHz.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.607-608
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• 2006

A CMOS phase-locked loop (PLL) which synthesizes frequencies between $6.336{\sim}8.976GHz$ in steps of 528MHz and settles in approximately 150ns using the 528MHz reference clock is presented. Frequency hopping between the bands in the each mode is critical point to design the PLL in multi-band orthogonal frequency division multiplexing (OFDM) because frequency switching between each band is less than 9.5ns. To achieve the fast loop settling, integer-N PLL that operates with the high reference frequency to meet the settling requirement is implemented. Two PLLs that operate at 9GHz and 528MHz is integrated and shows the band hopping lower than 1ns.

• Korean Journal of Optics and Photonics
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• v.22 no.5
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• pp.223-229
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• 2011

We present a low jitter frequency up-conversion detector based on quasi-phase matched sum frequency generation in a periodically poled $LiNbO_3$ waveguide for efficient single-photon detection at 1.5 ${\mu}m$ telecommunication wavelengths. The maximum detection efficiency and the noise count rate using the pump power of 300 mW and the pump wavelength of 974 nm are about 7% and 480 kHz, respectively. We also characterize the timing jitter of the frequency up-conversion detector by analyzing the time distribution of the detection outputs for photons generated through a picosecond pump pulsed spontaneous parametric downconversion. The minimum timing jitter was measured to be about 39.1 ps. Coincidence measurement with a narrow time window for pulsed up-conversion photons can eliminate the unwanted noise counts and maximize signal to noise ratio.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.154-157
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• 2000

One of the problems using DCR(Direct Conversion Receiver) type architecture are DC offset, Poor channel selectivity. APDP(Anti Parallel Diode Pair) can be mood candidate for the DCR frequency mixer due to its inherent 2nd harmonic suppression. APDP shows good IP2 and DC suppression. This paper describes single APDP LO power characteristics, IP2, and receiver structure utilizing APDP frequency mixer.

• ETRI Journal
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• v.33 no.5
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• pp.818-821
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• 2011

A D-band subharmonically-pumped resistive mixer has been designed, processed, and experimentally tested. The circuit is based on a $180^{\circ}$ power divider structure consisting of a Lange coupler followed by a ${\lambda}$/4 transmission line (at local oscillator (LO) frequency). This monolithic microwave integrated circuit (MMIC) has been realized in coplanar waveguide technology by using an InAlAs/InGaAs-based metamorphic high electron mobility transistor process with 100-nm gate length. The MMIC achieves a measured conversion loss between 12.5 dB and 16 dB in the radio frequency bandwidth from 120 GHz to 150 GHz with 4-dBm LO drive and an intermediate frequency of 100 MHz. The input 1-dB compression point and IIP3 were simulated to be 2 dBm and 13 dBm, respectively.

• ETRI Journal
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• v.46 no.2
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• pp.238-249
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• 2024

Equivalent-time sampling can improve measurement or sensing systems because it enables a broader frequency band and higher delay resolution for periodic signals with lower sampling rates than a Nyquist receiver. Meanwhile, a digital down-conversion (DDC) technique can be implemented using a straightforward radio frequency (RF) circuit. It avoids timing skew and in-phase/quadrature gain imbalance instead of requiring a high-speed analog-to-digital converter to sample an intermediate frequency (IF) signal. Therefore, when equivalent-time sampling and DDC techniques are combined, a significant synergy can be achieved. This study provides a parameter design methodology for optimal equivalent-time sampling using DDC.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.5
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• pp.480-485
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• 2004

In this paper, a new predistortion linearizing method using frequency up-conversion operation of mixer is proposed. This linearizing method doesn't require any additional signal sources in spite of frequency up-conversion mixing operation. This method extracts the 2nd low frequency intermodulation distortion signal from input signals and uses the extracted 2nd low frequency intermodulation distortion signal as mixing signal source. To show validation of the proposed predistortion method, we made K-PCS power amplifier. On 2-tone signals amplification process, the (C/I) ratio of amplifier is improved 26 ㏈ (@Po=22 ㏈m/tone), where two tones are 1.8544 ㎓ and 1.8556 ㎓, respectively. And (C/I) ratio is improved more than to 20 ㏈ for 17 ㏈ output signal dynamic range. On IS-95A CDMA 1FA amplification process, the improvements of adjacent channel power ratio(ACPR) are 10.8 ㏈ and 6.4 ㏈ at ${\pm}$885 ㎑ and ${\pm}$1.25 ㎒ offset points, respectively.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1166-1177
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• 2014

A new type of topology with medium-frequency-transformer (MFT) isolation for medium voltage wind power generation systems is proposed in this paper. This type of converter is a high density power conversion system, with high performance features suitable for next generation wind power systems in either on-shore or off-shore applications. The proposed topology employs single-phase cascaded multi-level AC-AC converters on the grid side and three phase matrix converters on the generator side, which are interfaced by medium frequency transformers. This avoids DC-Link electrolytic capacitors and/or resonant L-C components in the power flow path thereby improving the power density and system reliability. Several configurations are given to fit different applications. The modulation and control strategy has been detailed. As two important part of the whole system, a novel single phase AC-AC converter topology with its reliable six-step switching technique and a novel symmetrical 11-segment modulation strategy for two stage matrix converter (TSMC) is proposed at the special situation of medium frequency chopping. The validity of the proposed concept has been verified by simulation results and experiment waveforms from a scaled down laboratory prototype.