• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.2
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• pp.451-454
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• 2011

In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.591-600
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• 2010

In this paper, three kinds of 24 GHz low-power CMOS cross-coupled voltage controlled oscillators are designed and fabricated for a short-range radar applications using TSMC 0.13 ${\mu}m$ CMOS process. The basic CMOS crosscoupled voltage controlled oscillator is designed for oscillating around a center frequency of 24.1 GHz and subthreshold oscillators are developed for low power operation from it. A double resonant circuit is newly applied to the subthreshold oscillator to improve the problem that parasitic capacitance of large transistors in a subthreshold oscillator can push the oscillation frequency toward lower frequencies. The fabricated chips show the phase noise of -101~-103.5 dBc/Hz at 1 MHz offset, the output power of -11.85~-15.33 dBm and the frequency tuning range of 475~852 MHz. In terms of power consumption, the basic oscillator consumes 5.6 mW, while the subthreshold oscillator does 3.3 mW. The subthreshold oscillator with the double resonant circuit shows relatively lower power consumption and improved phase noise performance while maintaining a comparable frequency tuning range. The subthreshold oscillator with double resonances has FOM of -185.2 dBc based on 1 mW DC power reference, which is an about 3 dB improved result compared with the basic oscillator.

• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.33 no.3
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• pp.183-188
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• 1997

A method for designing a broadband transducer was investigated experimentally. Control of the resonance frequency of a Piezoelectric circular transducer with two pairs of electrodes was achieved by varying the inductance of external coil connected across the terminal of one pair of electrodes of transducer. The conductance curves of transducer in water were obtained as a function of the inductance value in mH of the coil used in the tuning. As the tuning inductance is increased in value, the resonance frequency is reduced toward the fundamental frequency of 50 kHz. This interesting result suggest that it is possible to produce a continuously tunable transducer covering a frequency range between 61.3 kHz and 121.7 kHz by varying the inductance value of external coil from 2.7 mH to 15.0 mH. One of other problems in the design and construction of such broadband transducer is the transducer efficiency, but this will be the subject of our future work.

• Journal of electromagnetic engineering and science
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• v.10 no.1
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• pp.35-38
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• 2010

A fully integrated parallel-coupled 6-GHz quadrature voltage-controlled oscillator (QVCO) has been designed. The symmetrical parallel-coupled quadrature VCO is implemented using 0.13-${\mu}m$ CMOS process. The measured phase noise is -101.05 dBc/Hz at an offset frequency of 1 MHz. The tuning range of 710 MHz is achieved with a control voltage ranging from 0.3 to 1.4 V. The average output phase error is about $1.26^{\circ}$ including cables and connectors. The QVCO dissipates 10 mA including buffer from the 1.5 V supply voltage. The output characteristic of the differential injection-locked frequency divider (DILFD), which has similar topology to the QVCO, is presented.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.149-151
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• 2015

Coupling with a ring of capacitors introduces in-phase coupling current in multi-stage LC oscillators, increasing coupling strength and phase spacing accuracy. Capacitive coupling is effective at high-frequency applications because it increases coupling strength with the operating frequency. However, capacitive loading from the ring lowers operating frequency and reduces the tuning range. Mathematical expressions of phase noise and phase spacing accuracy with capacitive coupling are examined here, and transistor-level simulations confirm the effectiveness of the capacitive coupling.

• Journal of IKEEE
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• v.11 no.3
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• pp.122-128
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• 2007

Sinusoidal voltage-controlled oscillators (VCOs) based on Colpitts and Hartley oscillators are presented. They consist of a LC parallel-tuned circuit connected in a negative-feedback loop with an OTA-R amplifier and two diode limiters, where the inductor is simulated one realized with temperature-stable linear operational transconductance amplifiers (OTAs) and a grounded capacitor. Prototype VCOs are built with discrete components. The Colpitts VCO exhibits less than 1% nonlinearity in its current-to-frequency transfer characteristic from 4.2 to 21.7 MHz and ${\pm}$95 ppm/$^{\circ}C$ temperature drift of frequency over 0 to $70^{\circ}C$. The total harmonic distortion (THD) is as low as 2.92% with a peak-to-peak amplitude of 0.7 V for a frequency-tuning range of 10.8-32 MHz. The Hartley VCO has the temperature drift and THD of two times higher than those of the Colpitts VCO.

• Journal of electromagnetic engineering and science
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• v.7 no.2
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• pp.64-68
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• 2007

An InGaP/GaAs HBT based differential Colpitts voltage control oscillator(VCO) is presented in this paper. In the VCO core, two switching transistors are introduced to steer the core bias current to save power. An LC tank with an inductor quality factor(Q) of 11.4 is used to generate oscillation frequency. It has a superior phase noise characteristics of -130.12 dBc/Hz and -105.3 at 1 MHz and 100 kHz frequency offsets respectively from the carrier frequency(1.566 GHz) when supplied with a control voltage of 0 volt. It dissipates output power of -5.3 dBm. Two pairs of on-chip base collector (BC) diodes are used in the tank circuit to increase the VCO tuning range(168 MHz). This VCO occupies the area of $1.070{\times}0.90mm^2$ including buffer and pads.

• Current Optics and Photonics
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• v.7 no.4
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• pp.443-448
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• 2023

The ±1-order Kelly sidebands with dispersion-dependent spacing of mode-locking fiber lasers are investigated for frequency-tunable terahertz signal generation. The principle of dispersion dependence of Kelly sidebands is analyzed. A new method, which is a dispersion-management mechanism introduced into the fiber-laser cavity, is proposed to generate Kelly sidebands with widely tunable wavelength spacing. A spacing tuning range of up to 28.46 nm of the ±1-order Kelly sidebands is obtained in simulation. Using the data of the optical spectrum with dispersion-dependent Kelly sidebands, the frequency spectrum of generated terahertz signals is calculated. Consequently, the signal frequency can be changed from 0.09 to 2.27 THz.

• Journal of IKEEE
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• v.14 no.1
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• pp.65-74
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• 2010

The Digital TV(DTV) standard has ushered in a new era in TV broadcasting and raised a great demand for DTV tuners. There are many challenges in designing a DTV tuner, of which the most difficult part is the frequency synthesizer. This paper presents the design of a frequency synthesizer for DTV Tuners in a $0.18{\mu}m$ CMOS process. It satisfies the DTV(ATSC) frequency band(54~806MHz). A scheme is proposed to cover the full band using only one VCO. The VCO has been designed to operate at 1.6~3.6GHz band such that the LO pulling effect is minimized, and reliable broadband characteristics have been achieved by reducing the variations of VCO gain and frequency step. The simulation results show that the designed VCO has gains of 59~94MHz(${\pm}$17.7MHz/V,${\pm}$23%) and frequency steps of 26~42.5MHz(${\pm}$8.25MHz/V,${\pm}$24%), and a very wide tuning range of 76.9%. The designed frequency synthesizer has a phase noise of -106dBc/Hz at 100kHz offset, and the lock time is less than $10{\mu}$sec. It consumes 20~23mA from a 1.8V supply, and the chip size including PADs is 2.0mm${\times}$1.8mm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.10
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• pp.971-978
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• 2013

This work presents a W band frequency synthesizer which is composed of 26 GHz VCO, Phase Locked Loop and frequency tripler using 65 nm RF CMOS process. Frequency tuning range of 26 GHz VCO covers the band from 22.8~26.8 GHz and final output frequency of the tripler is from 74 to 75.6 GHz. The fabricated frequency synthesizer consumes 75.6 mW and its phase noise is -75 dBc/Hz at 1 MHz offset, -101 dBc/Hz 10 MHz offset respectively.