• The Transactions of the Korea Information Processing Society
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• v.7 no.1
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• pp.235-244
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• 2000

This paper presents a low power PLL based clock geneator circuit for microprocessors. It generates 32MHz${\sim}$1GHz clocks and can be integrated inside microprocessor chips. A high speed D Flip-Flop is designed using dynamic differential latch and a new Phase Frequency Detector(PFD) based on this FF is presented. The PFD enjoys low error characteristics in phase sensitivity and the PLL using this PFD has a low phase error. To improve the linearity of voltage controlled oscillator(VCO) in PLL, the voltage to current converter and current controlled oscillator combination is suggested. The resulting PLL provides wide lock range and extends frequency of generated clocks over 1 GHz. The clock generator is designed by using $0.65\;{\mu}m$ CMOS full custom technology and operates with $11\;{\mu}s$ lock-in time. The power consumption is less than 20mW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.20-27
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• 2011

A CMOS Image Sensor(CIS) mounted on mobile appliances always needs a low power consumption because of the battery life cycle. In this paper, we propose novel power reduction techniques such as a data flip-flop circuit with leakage current elimination, a low power single slope A/D converter with a novel comparator, and etc. Based on 0.13um CMOS process, the chip satisfies QVGA resolution($320{\times}240$ pixels) whose pitch is 2.25um and whose structure is 4-Tr active pixel sensor. From the experimental results, the ADC in the middle of CIS has a 10-b resolution, the operating speed of CIS is 16 frame/s, and the power dissipation is 25mW at 3.3V(Analog)/1.8V(Digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption is reduced approximately by 22% in sleep mode, 20% in operating mode.

• The Journal of the Convergence on Culture Technology
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• v.6 no.4
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• pp.767-776
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• 2020

GcGAN is a deep learning model to translate styles between images under geometric consistency constraint. However, GcGAN has a disadvantage that it does not properly maintain detailed content of an image, since it preserves the content of the image through limited geometric transformation such as rotation or flip. Therefore, in this study, we propose a new image-to-image translation method, MSGcGAN(Multi-Scale GcGAN), which improves this disadvantage. MSGcGAN, an extended model of GcGAN, performs style translation between images in a direction to reduce semantic distortion of images and maintain detailed content by learning multi-scale images simultaneously and extracting scale-invariant features. The experimental results showed that MSGcGAN was better than GcGAN in both quantitative and qualitative aspects, and it translated the style more naturally while maintaining the overall content of the image.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.22 no.5
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• pp.1019-1025
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• 2012

Fault attacks manipulate the computation of an algorithm and get information about the private key from the erroneous result. It is the most powerful attack for the cryptographic device. Currently, the research on error detection methods and fault attacks have been studied actively. S. Pontarelli et al. introduced an error detection method in 2009. It can detect an error that occurs during Elliptic Curve Scalar Multiplication (ECSM). In this paper, we present a new fault attack. Our attack can avoid the error detection method introduced by S. Pontarelli et al. We inject a bit flip error in the Euclidean Addition Chain (EAC) on the private key in ECSM and retrieve the private key.

• ETRI Journal
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• v.31 no.5
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• pp.631-633
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• 2009

We introduce an improved Ethernet ring protection method, selective filtering database (FDB) advertisement, to minimize traffic overshoot in the event of a failure or recovery. On the protection switching event, the proposed method makes all ring nodes perform an FDB flush except the FDB entries associated with their client subnets. Then, ring nodes rapidly exchange their client MAC address lists so that their FDBs are immediately updated by indirect MAC address learning. The proposed scheme guarantees fast and reliable protection switching over the standard scheme.

• 한국HCI학회:학술대회논문집
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• 2009.02a
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• pp.240-244
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• 2009

In this paper, we present FloatingPad, a touch pad based device with better scrolling feature and more interaction styles than a traditional touch pad. When we interact with a real object like a picture or a book, we manipulate on the object, and we also move, rotate, and flip the object. We applied this idea into a touch pad. In FloatingPad, the touch pad is not fixed to the device. It is floating on the device; it can be slid on the device. Therefore a user can have additional degree of freedom of input by shifting and rotating the touch pad while having the traditional touch pad input. By using this technique, the interactivity of the touch pad can be augmented, and better scrolling feature can be provided by reducing clutching occurs on the position scrolling devices by using the movement of the touch pad as rate control. We implemented the prototype device and conducted a user study with three applications developed for FloatingPad.

• Journal of Biomedical Engineering Research
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• v.29 no.4
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• pp.267-271
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• 2008

The RF shimming technique has been used to improve the transmit RF field homogeneity in highfield MRI. In the RF shimming technique, the amplitude and phase of the driving currents in each coil element are optimized to get homogenous flip angle or uniform image intensity. The inductive and capacitive coupling between the coil elements may degrade the RF field homogeneity if not taken into account in the optimization procedure. In this paper, we have analyzed the coupling effects on the RF shimming using a sixteen-element TEM RF coil model operating at 300 MHz. We have found that the coupling effects on the RF shimming can be reduced by putting high dielectric material between the active rung and the shield.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.1005-1008
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• 2003

We report a new FCOG (flip chip on glass) technique using solder bumps for display packaging applications. The In and Sn solder bumps of 40 ${\mu}m$ pitches were formed on Si and glass substrate. The In and Sn bumps were bonded at 125 at the pressure of 3 mN/bump. The metallurgical bonding was confirmed using cross-sectional SEM. The contact resistance of the solder joint was 65 $m{\Omega}$ which was much lower than that of the joint made using the conventional ACF bonding technique. We demonstrate that the new COG technique using solder bump to bump direct bonding can be applied to advanced LCDs that lead to require higher quality, better resolution, and lower power consumption.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.1
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• pp.7-13
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• 2011

According to increasing of data transfer rate, printed circuit board (PCB) is required improvement of transmission speed. Optical PCB and its packaging technology can be one of the solutions that overcome the limitations of conventional electrical PCB. The data transmission capacity will be increased 10 Tbps at 2015. To this end, studies on various OPCB technologies are being conducted. For cost-effective and high- performance OPCB, studies of optical coupling by polymer replication process are conducted. In this work, optical waveguide and optical fiber array block were sequentially fabricated by polymer pattern replication method. Using this method we successfully demonstrate low loss optical fiber coupling between optical waveguide and optical fiber arrays. And researches on flip chip bonding process and using electro-optic connectors for packaging are conducted.

• Proceedings of the KWS Conference
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• 2007.11a
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• pp.150-152
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• 2007

It has been known that the underfilling technique is effective in reducing thermal and environmental stress concentration at solder joint in FC asscemblies. In this paper, the effect of thermomechanical properties of underfill such as coefficient of thermal expansion(CTE) and Young's modulus on reliability of FC assembly under thermal cycling was investigated. For parametric study for optimal design of underfill, finite element analyses(FEA) were performed for seven different CTEs and five different Young's modulus. The results show that the concentrated maximum stress decreases as Young's modulus of underfill increases and the CTE of underfill decreases.