• Title/Summary/Keyword: Flip-chip packaging

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Electro-migration Phenomenon in Flip-chip Packages (플립칩 패키지에서의 일렉트로마이그레이션 현상)

  • Lee, Ki-Ju;Kim, Keun-Soo;Suganuma, Katsuaki
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.4
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    • pp.11-17
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    • 2010
  • The electromigration phenomenon in lead-free flip-chip solder joint has been one of the serious problems. To understand the mechanism of this phenomenon, the crystallographic orientation of Sn grain in the Sn-Ag-Cu solder bump has been analyzed. Different time to failure and different microstructural changes were observed in the all test vehicle and bumps, respectively. Fast failure and serious dissolution of Cu electrode was observed when the c-axis of Sn grain parallel to electron flow. On the contrary of this, slight microstructural changes were observed when the c-axis of Sn perpendicular to electron flow. In addition, underfill could enhance the electromigration reliability to prevent the deformation of solder bump during EM test.

In-situ Observation of Electromigration Behaviors of Eutectic SnPb Line (공정조성 SnPb 솔더에 대한 실시간 Electromigration 거동 관찰)

  • Kim Oh-Han;Yoon Min-Seung;Joo Young-Chang;Park Young-Bae
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.4 s.37
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    • pp.281-287
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    • 2005
  • in-situ electromigration test was carried out for edge drift lines of eutectic SnPb solder using Scanning Electron Microscopy (SEM). The electromigration test for the eutectic SnPb solder sample was conducted at temperature of $90^{\circ}C$ and the current density of $6{\times}10^4A/cm^2$. Edge drift at cathode and hillock growth at anode were observed in-situ in a SEM chamber during electromigration test. It was clearly revealed that eutectic SnPb solder lines has an incubation stage before void formation during electromigration test, which seemed to be related to the void nucleation stage of flip chip solder electromigration behaviors.

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A Study on the Characterization of Electroless and Electro Plated Nickel Bumps Fabricated for ACF Application (무전해 및 전해 도금법으로 제작된 ACF 접합용 니켈 범프 특성에 관한 연구)

  • Jin, Kyoung-Sun;Lee, Won-Jong
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.3
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    • pp.21-27
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    • 2007
  • Nickel bumps for ACF(anisotropic conductive film) flip chip application were fabricated by electroless and electro plating and their mechanical properties and impact reliability were examined through the compressive test, bump shear test and drop test. Stress-displacement curves were obtained from the load-displacement data in the compressive test using nano-indenter. Electroplated nickel bumps showed much lower elastic stress limits (70MPa) and elastic moduli ($7.8{\times}10^{-4}MPa/nm$) than electroless plated nickel bumps ($600-800MPa,\;9.7{\times}10^{-3}MPa/nm$). In the bump shear test, the electroless plated nickel bumps were deformed little by the test blade and bounded off from the pad at a low shear load, whereas the electroplated nickel bumps allowed large amount of plastic deformation and higher shear load. Both electroless and electro plated nickel bumps bonded by ACF flip chip method showed high impact reliability in the drop impact test.

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Regulation in Shear Test Method for BGA of Flip-chip Packages (플립칩 패키지 BGA의 전단강도 시험법 표준화)

  • Ahn, Jee-Hyuk;Kim, Kwang-Seok;Lee, Young-Chul;Kim, Yong-Il;Jung, Seung-Boo
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.3
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    • pp.1-9
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    • 2010
  • We reported the methodology for the shear test which is one of the evaluation procedure for mechanical reliability of flip-chip package. The shear speed and the tip height are found to be two significant experimental parameters in the shear test. We investigated how these two parameters have an influence on the results, the shear strength and failure mode. In order to prove these experimental inconsistency, simulation using finite element analysis was also conducted to calculate the shear strength and to figure out the distribution of plastic energy inside of the solder ball. The shear strength decreased while the tip height increased or the shear speed decreased. A variation in shear strength due to inconsistent shear conditions made confusion on analyzing experimental results. As a result, it was strongly needed to standardize the shear test method.

Aging Characteristic of Intermetallic Compounds and Bonding Strength of Flip-Chip Solder Bump (플립 칩 솔더 범프의 접합강도와 금속간 화합물의 시효처리 특성)

  • 김경섭;장의구;선용빈
    • Journal of the Microelectronics and Packaging Society
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    • v.9 no.1
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    • pp.35-41
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    • 2002
  • Flip-chip interconnection that uses solder bump is an essential technology to improve the performance of micro-electronics which require higher working speed, higher density, and smaller size. In this paper, the shear strength of Cr/Cr-Cu/Cu UBM structure of the high-melting solder bump and that of low-melting solder bump after aging is evaluated. Observe intermetallic compound and bump joint condition at the interface between solder and UBM by SEM and TEM. And analyze the shear load concentrated to bump applying finite element analysis. As a result of experiment, the maximum shear strength of Sn-97wt%Pb which was treated 900 hrs aging has been decreased as 25% and Sn-37wt%Pb sample has been decreased as 20%. By the aging process, the growth of $Cu_6/Sn_5$ and $Cu_3Sn$ is ascertained. And the tendency of crack path movement that is interior of a solder to intermetallic compound interface is found.

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Formation of Sn-Cu Solder Bump by Electroplating for Flip Chip (플립칩용 Sn-Cu 전해도금 솔더 범프의 형성 연구)

  • 정석원;강경인;정재필;주운홍
    • Journal of the Microelectronics and Packaging Society
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    • v.10 no.4
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    • pp.39-46
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    • 2003
  • Sn-Cu eutectic solder bump was fabricated by electroplating for flip chip and its characteristics were studied. A Si-wafer was used as a substrate and the UBM(Under Bump Metallization) of Al(400 nm)/Cu(300 nm)/Ni(400 nm)/Au(20 nm) was coated sequentially from the substrate to the top by an electron beam evaporator. The experimental results showed that the plating ratio of the Sn-Cu increased from 0.25 to 2.7 $\mu\textrm{m}$/min with the current density of 1 to 8 A/d$\m^2$. In this range of current density the plated Sn-Cu maintains its composition nearly constant level as Sn-0.9∼1.4 wt%/Cu. The solder bump of typical mushroom shape with its stem diameter of 120 $\mu\textrm{m}$ was formed through plating at 5 A/d$\m^2$ for 2 hrs. The mushroom bump changed its shape to the spherical type of 140 $\mu\textrm{m}$ diameter by air reflow at $260^{\circ}C$. The homogeneity of chemical composition for the solder bump was examined, and Sn content in the mushroom bump appears to be uneven. However, the Sn distributed more uniformly through an air reflow.

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Control of Position of Neutral Line in Flexible Microelectronic System Under Bending Stress (굽힘응력을 받는 유연전자소자에서 중립축 위치의 제어)

  • Seo, Seung-Ho;Lee, Jae-Hak;Song, Jun-Yeob;Lee, Won-Jun
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.2
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    • pp.79-84
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    • 2016
  • A flexible electronic device deformed by external force causes the failure of a semiconductor die. Even without failure, the repeated elastic deformation changes carrier mobility in the channel and increases resistivity in the interconnection, which causes malfunction of the integrated circuits. Therefore it is desirable that a semiconductor die be placed on a neutral line where the mechanical stress is zero. In the present study, we investigated the effects of design factors on the position of neutral line by finite element analysis (FEA), and expected the possible failure behavior in a flexible face-down packaging system assuming flip-chip bonding of a silicon die. The thickness and material of the flexible substrate and the thickness of a silicon die were considered as design factors. The thickness of a flexible substrate was the most important factor for controlling the position of the neutral line. A three-dimensional FEA result showed that the von Mises stress higher than yield stress would be applied to copper bumps between a silicon die and a flexible substrate. Finally, we suggested a designing strategy for reducing the stress of a silicon die and copper bumps of a flexible face-down packaging system.

A Study on the Eutectic Pb/Sn Solder Filip Chip Bump and Its Under Bump metallurgy(UBM)

  • Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.5 no.1
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    • pp.7-18
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    • 1998
  • In the flip chip interconnection on organic substrates using eutectic Pb/Sn solder bumps highly reliable Under Bump Metallurgy (UBM) is required to maintain adhesion and solder wettability. Various UBM systems such as 1$\mu$m Al/0.2$\mu$m Pd/1$\mu$m Cu, laid under eutectic Pb/Sn solder were investigated with regard to their interfacial reactions and adhesion proper-ties. The effects of numbers of solder reflow and aging time on the growth of intermetallic compounds (IMCs) and on the solder ball shear strength were investigated. Good ball shear strength was obtained with 1$\mu$m Al/0.2$\mu$m Ti/5$\mu$m Cu and 1$\mu$m Al/0.2$\mu$m ni/1$\mu$m Cu even after 4 solder reflows or 7 day aging at 15$0^{\circ}C$. In contrast 1$\mu$m Al/0.2$\mu$m Ti/1$\mu$m Cu and 1$\mu$mAl/0.2$\mu$m Pd/1$\mu$m 쳐 show poor ball shear strength. The decrease of the shear strength was mainly due to the direct contact between solder and nonwettable metal such as Ti and Al resulting in a delamination. In this case thin 1$\mu$m Cu and 0.2$\mu$m Pd diffusion barrier layer were completely consumed by Cu-Sn and pd-Sn reaction.

The Wetting Properties of UBM-coated Si-wafer to the Lead-free Solders in Si-wafer/Bumps/Glass Flip-Chip Bonding System

  • Hong, Soon-Min;Park, Jae-Yong;Park, Chang-Bae;Jung, Jae-Pil;Kang, Choon-Sik
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.04a
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    • pp.74-79
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    • 2000
  • In an attempt to estimate the wetting properties of wettable metal layers by wetting balance method, an analysis of wetting curves of the coating layer was performed. Based on the analysis, wetting properties of UBM-coated Si-plate were estimated by the new wettability indices. The wetting curves of the one and both sides-coated UBM layers have the similar shape and show the similar tendency to the temperature. So the wetting property estimation of one side coating is possible with wetting balance method. For UBM of Si-chip, Cr/Cu/Au UBM is better than Ti/Ni/Au in the point of wetting time. At general reflow temperature, the wettability of high melting point solders(Sn-Sb, Sn-Ag) is better than that of few melting point ones(Sn-Bi, Sn-In).The contact angle of the one side coated plate to the solder can be calculated from the farce balance equation by measuring the static state force and the tilt angle.

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A Study on the Improvement of Solder Joint Reliability for 153 FC-BGA (153 FC-BGA에서 솔더접합부의 신뢰성 향상에 관한 연구)

  • 장의구;김남훈;유정희;김경섭
    • Journal of the Microelectronics and Packaging Society
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    • v.9 no.3
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    • pp.31-36
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    • 2002
  • The 2nd level solder joint reliability of 153 FC-BGA for high-speed SRAM (Static Random Access Memory) with the large chip on laminate substrate comparing to PBGA(Plastic Ball Grid Array) was studied in this paper. This work has been done to understand an influence as the mounting with single side or double sides, structure of package, properties of underfill, properties and thickness of substrate and size of solder ball on the thermal cycling test. It was confirmed that thickness of BT(bismaleimide tiazine) substrate increased from 0.95 mm to 1.20 mm and solder joint fatigue life improved about 30% in the underfill with the low young's modulus. And resistance against the solder ball crack became twice with an increase of the solder ball size from 0.76 mm to 0.89 mm in solder joints.

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