• Clean Technology
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• v.18 no.1
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• pp.69-75
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• 2012

In this study, we executed an environmental impact assessment about recycling of ITO (Indium Tin Oxide), used for touch panel. ITO is mainly used to make transparent conductive coatings for touch and flat screen LCD (Liquid Crystal Display), ELD (Emitting Light Device), PDP (Plasma Display Panel). This demand is increasing little by little. but form current status, ITO is discarded than recycling. It is important to recycling ITO for national strategies about resource conservation, and reduce environmental burden. Also Landfill or incineration of ITO cloud be harmful to the human health in the long-term. Material Life Cycle Assessment method (MLCA) was conducted for comparison landfill and recycling of ITO. MLCA would provide more information for environmental issues and potential environmental impacts of ITO. The study includes two scenarios, the basic scenario is recycling of ITO (10, 20, 30%) and the other scenario is landfill of ITO. In addition, amount of carbon dioxide and energy were calculated.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.1
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• pp.51-57
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• 2005

In this paper, we propose an adaptive contrast control method for the flat real-time processing. The proposed method has employed probability density function(PDF) in order to control a sudden change in image-brightness. In addition, the proposed algerian obtains the maximum contrast without affecting the processed image. In order to reduce hardware complexity, we have utilized approximated CDF based on sampling values. Visual test and standard deviation of their histogram have been introduced to evaluate the resultant output images of at: proposed method and the original ones.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.19 no.4
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• pp.553-561
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• 2010

In flat panel display or semiconductor industries, they install the equipments with fine line width and high throughput for fabrication and inspection. The equipments are required to have the linear stage which can position the work-piece with high speed, fine resolution on wide range of motion. In this paper, a precision planar linear XY stage is proposed. The stage has a symmetric planar window configuration and is guided by air-bearings on granite plate. The symmetric planar window configuration makes the stage has robustness against dynamic and thermal disturbances. The air-bearings let the stage move smooth on straight guide bar and flat granite surface. The stage is actuated by linear motor with Halbach magnet array (HMA). HMA generates more confined magnetic flux than conventional array. The linear motors are optimized by using sequential quadratic programming (SQP) with the several constraints that are thermal dissipation, required power, force ripple and so on. The planar linear XY stage with the symmetric planar configuration and the linear motors is implemented and then the performance such as force ripple, resolution and stroke are evaluated.

• Korean Journal of Materials Research
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• v.24 no.8
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• pp.429-433
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• 2014

As the fabrication technology used in FPDs(flat-panel displays) advances, the size of these panels is increasing and the pattern size is decreasing to the um range. Accordingly, a cleaning process during the FPD fabrication process is becoming more important to prevent yield reductions. The purpose of this study is to develop a FPD cleaning system and a cleaning process using a two-phase flow. The FPD cleaning system consists of two parts, one being a cleaning part which includes a two-phase flow nozzle, and the other being a drying part which includes an air-knife and a halogen lamp. To evaluate the particle removal efficiency by means of two-phase flow cleaning, silica particles $1.5{\mu}m$ in size were contaminated onto a six-inch silicon wafer and a four-inch glass wafer. We conducted cleaning processes under various conditions, i.e., DI water and nitrogen gas at different pressures, using a two-phase-flow nozzle with a gap distance between the nozzle and the substrate. The drying efficiency was also tested using the air-knife with a change in the gap distance between the air-knife and the substrate to remove the DI water which remained on the substrate after the two-phase-flow cleaning process. We obtained high efficiency in terms of particle removal as well as good drying efficiency through the optimized conditions of the two-phase-flow cleaning and air-knife processes.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1750-1752
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• 1999

An active-matrix liquid crystal display (LCD) using thin film transistors (TFTs) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the sate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the new set of capacitance models on the pixel operations can be effectively analyzed. The set of models which is adopted from VLSI interconnections calculate more precise capacitance. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.234-240
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• 2015

Amorphous oxide-based thin-film transistors (TFTs) have drawn a lot of attention recently for the next-generation high-resolution display industry. The required field-effect mobility of oxide-based TFTs has been increasing rapidly to meet the demands of the high-resolution, large panel size and 3D displays in the market. In this regard, the current status and major trends in the high mobility oxide-based TFTs are briefly reviewed. The various approaches, including the use of semiconductor, dielectric, electrode materials and the corresponding device structures for realizing high mobility oxide-based TFT devices are discussed.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.8
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• pp.761-771
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• 2009

Detecting defects on FPD (Flat Panel Display) color filter before the full panel is made is important to reduce the manufacturing cost. Among many types of defects, the low contrast blemish such as Suzi Mura is difficult to detect using standard CCD cameras. Even skilled inspectors in the inspection line can hardly identify such defects using bare eyes. To overcome this difficulty, point spectrometer has been used to analyze the spectrum to differentiate such defects from normal color filters. However, scanning ever increasing-size color filters by a point spectrometer takes too long time to be used in real production line. We propose a system using a spectral camera which can be viewed as a line scan camera composed of an array of point spectrometers. Three types of lighting system that exhibit different illumination spectrums are devised together with a calibration method of the proposed spectral camera system. To visualize the defect areas, various processing algorithms to identify and to enhance the small differences in spectrum between defective and normal areas are developed. Experiments shows 85% successful visualization. of real samples using the proposed system.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• v.10 no.1
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• pp.47-60
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• 2006

Due to the uneven illumination of FPD panel surface, it is difficult to detect the defects. The paper proposes a method to find the uneven illumination compensation using wavelets, which are done based on multi-resolution structure. The first step is to decompose the image into multi-resolution levels. Second, elimination of lowest smooth sub-image with highest frequency band removes the high frequency noise and low varying illumination. In particular, the main algorithm was implemented by lifting scheme for realtime inline process.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.263-263
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• 2011

본 연구에서는 DBD (Dielectric Barrier Discharge)방식의 상압 플라즈마를 이용하여 FPD (flat panel display) 공정에 사용되는 a-Si, Si3N4의 식각 공정 특성을 평가하였다. 사용된 DBD 반응기는 기존의 blank planar plate 형태의 Power가 인가되는 anode 부분과 Dielectric Barrier 사이 공간을 액상의 도전체로 채워 넣은 형태의 전극이 사용 하였으며, 인가 Power는 40kHz AC 최대인가 전압 15 kVp를 사용 하였다. 방전 가스는 N2, 반응가스로는 CDA (Clean Dry Air)와 NF3, 액상의 Etchant를 사용 하였으며 모든 공정은 In-line type으로 시편을 처리 하였다. NF3의 경우 30 mm/sec 이송속도 1회 처리 기준 a-Si 1300${\AA}$, Si3N4 1900${\AA}$의 식각 두께를 보였으며 a-Si : Si3N4 선택비는 N2, CDA의 조절을 통하여 최대 1:2에서 4:1 정도까지 변화가 가능하였다. 균일도는 G2 (370 mm${\times}$470 mm)의 경우 5.8 %의 균일도를 보이고 있다. 이외에도 NF3 공정의 경우 실제 TFT-LCD 공정 중 n+ channel (n+ a-Si:H)식각 공정에 적용하여 5.5 inch LCD panel feasibility를 확인 할 수 있었다. 액상 Etchant (HF수용액, NH4HF2)는 버블러를 사용하여 기화 시켜 플라즈마 소스를 통해 1차적으로 활성화 시키고 기존 DBD 반응기에 공급해 주는 형태로 평가를 진행하였다. 식각 특성은 30mm/sec 이송속도에서 a-Si $25{\AA}$ 정도로 가스 형태의 Etchant에 비해 매우 낮은 수준이나 Etching rate 향상을 위한 factor 파악 및 개선을 위한 연구를 진행 하였다.

• Journal of the Korean Vacuum Society
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• v.16 no.6
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• pp.414-423
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• 2007

Field Emission Display(FED) has significant advantages over existing display technologies, particularly in the area of small and high quality display. In order to test the feasibility of fabricating the System-on-Chip(SOC) with FED, we conducted the experiment to use the p-n junction as an electron beam source for the flat panel display. A novel structure was constructed to form p-n junctions by generating inversion layer with the electric field from the cantilever style gate. When we applied more than 220V at the cantilever style gate which has a height of $1{\mu}m$, avalanche breakdown onset was successfully achieved. The characteristics was compared with the electron emission from the ultra shallow junction in the avalanche region. The experiment result and the future direction were discussed.