• Title/Summary/Keyword: Flat band voltage

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Increasing P/E Speed and Memory Window by Using Si-rich SiOx for Charge Storage Layer to Apply for Non-volatile Memory Devices

  • Kim, Tae-Yong;Nguyen, Phu Thi;Kim, Ji-Ung;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.254.2-254.2
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    • 2014
  • The Transmission Fourier Transform Infrared spectroscopy (FTIR) of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000~2300 cm-1. It indicated that the existence of many silicon phases and defect sources in the matrix of the SiOx films. The total hysteresis width is the sum of the flat band voltage shift (${\Delta}VFB$) due to electron and hole charging. At the range voltage sweep of ${\pm}15V$, the ${\Delta}VFB$ values increase of 0.57 V, 1.71 V, and 13.56 V with 1/2, 2/1, and 6/1 samples, respectively. When we increase the gas ratio of SiH4/N2O, a lot of defects appeared in charge storage layer, more electrons and holes are charged and the memory window also increases. The best retention are obtained at sample with the ratio SiH4/N2O=6/1 with 82.31% (3.49V) after 103s and 70.75% after 10 years. The high charge storage in 6/1 device could arise from the large amount of silicon phases and defect sources in the storage material with SiOx material. Therefore, in the programming/erasing (P/E) process, the Si-rich SiOx charge-trapping layer with SiH4/N2O gas flow ratio=6/1 easily grasps electrons and holds them, and hence, increases the P/E speed and the memory window. This is very useful for a trapping layer, especially in the low-voltage operation of non-volatile memory devices.

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Electrical properties of metal-oxide-semiconductor structures containing Si nanocrystals fabricated by rapid thermal oxidation process (급속열처리산화법으로 형성시킨 $SiO_2$/나노결정 Si의 전기적 특성 연구)

  • Kim, Yong;Park, Kyung-Hwa;Jung, Tae-Hoon;Park, Hong-Jun;Lee, Jae-Yeol;Choi, Won-Chul;Kim, Eun-Kyu
    • Journal of the Korean Vacuum Society
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    • v.10 no.1
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    • pp.44-50
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    • 2001
  • Metal oxide semiconductor (MOS) structures containing nanocrystals are fabricated by using rapid thermal oxidations of amorphous silicon films. The amorphous films are deposited either by electron beam deposition method or by electron beam deposition assisted by Ar ion beam during deposition. Post oxidation of e-beam deposited film results in relatively small hysteresis of capacitance-voltage (C-V) and the flat band voltage shift, $\DeltaV_{FB}$ is less than 1V indicative of the formation of low density nanocrystals in $SiO_2$ near $SiO_2$/Si interface. By contrast, we observe very large hysteresis in C-V characteristics for oxidized ion-beam assisted e-beam deposited sample. The flat band voltage shift is larger than 22V and the hysteresis becomes even broader as increasing injection times of holes at accumulation condition and electrons at inversion condition. The result indicates the formation of slow traps in $SiO_2$ near $SiO_2$/Si interface which might be related to large density nanocrystals. Roughly estimated trap density is $1{\times}10^{13}cm^{-2}$. Such a large hysteresis may be explained in terms of the activation of adatom migration by Ar ion during deposition. The activated migration may increase nucleation rate of Si nuclei in amorphous Si matrix. During post oxidation process, nuclei grow into nanocrystals. Therefore, ion beam assistance during deposition may be very feasible for MOS structure containing nanocrystals with large density which is a basic building block for single electron memory device.

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MnO2 co-catalyst effect on Photoelectrochemical Properties of GaN Photoelectrode (MnO2 조촉매가 코팅된 GaN 광전극의 광전기화학적 특성)

  • Kim, Haseong;Bae, Hyojung;Kang, Sung-Ju;Ha, Jun-Seok
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.4
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    • pp.113-117
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    • 2016
  • Recently, hydrogen is regarded as important energy in the future, because it is clean and renewable. The photoelectrochemical (PEC) system, which produce hydrogen using water splitting by solar energy, is one of the most promising energy systems because it has abundant energy sources and good theoretical efficiency. GaN has recently been regarded as suitable photoelectrode that could be used to split water to generate hydrogen without extra bias because its band edge position include water redox potential ($V_{redox}=1.23$ vs. SHE). GaN also shows considerable corrosion resistance in aqueous solutions and it is possible to control its properties, such as structure, band gap, and catalyst characteristics, in order to improve solar energy conversion efficiency. But, even if the band edge position of GaN make PEC reaction facilitate without bias, the overpotential of oxygen evolution reaction could reduce the efficiency of system. One of the ways to decrease overpotential is introduction of co-catalyst on photoelectrode. In this paper, we will investigate the effect of manganese dioxide ($MnO_2$) as a co-catalyst. $MnO_2$ particles were dispersed on GaN photoelectrode by spincoater and analyzed properties of the PEC system using potentiostat (PARSTAT4000). After coating $MnO_2$, the flat-band potential ($V_{fb}$) and the onset voltage ($V_{onset}$) were moved negatively by 0.195 V and 0.116 V, respectively. The photocurrent density increased on $MnO_2$ coated sample and time dependence was also improved. These results showed $MnO_2$ has an effect as a co-catalyst and it would enhance the efficiency of overall PEC system.

Study on Electrical Characteristics of Hafnium Silicate Films with Low Temperature O2 Annealing (저온 Osub2 어닐링 공정을 통한 HfSixOy의 전기적 특성 개선)

  • Lee, Jung-Chan;Kim, Kwang-Sook;Jeong, Seok-Won;Roh, Yong-Han
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.5
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    • pp.370-373
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    • 2011
  • We investigated the effects of low temperature ($500^{\circ}C$) $O_2$ annealing on the characteristics of hafnium silicate ($HfSi_xO_y$) films deposited on a Si substrate by atomic layer deposition (ALD). We found that the post deposition annealing under oxidizing ambient causes the oxidation of residual Hf metal components, resulting in the improvement of electrical characteristics such as flat band voltage shift (${\Delta}V_{fb}$) by hysteresis without oxide capacitance reduction. We suggest that post deposition annealing under oxidizing ambient is necessary to improve the electrical characteristics of $HfSi_xO_y$ films deposited by ALD.

Electrical Properties of SiOCH Thin Films by Annealing (SiOCH 박막의 열처리에 따른 전기적인 특성)

  • Kim, Min-Seok;Hwang, Chang-Su;Kim, Hong-Bae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.12
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    • pp.1090-1095
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    • 2008
  • The SiOCH films that low dielectric interlayer dielectric materials were deposited on p-type Si(100) substrates through the dissociation of BTMSM precursors with oxygen gas by using PECVD method. BTMSM precursor was introduced with the flow rates from 42 sccm to 60 sccm by 2 sccm step in the constant flow rate of 60 sccm $O_2$. SiOCH thin films were annealed at $450^{\circ}C$ for 30 minutes. The electrical property of SiOCH thin films was studied by MIS, Al/SiOCH/p-Si(100), structure. Annealed samples showed even greater reductions of the maximum capacitance and the dielectric constant of the SiOCH samples, owing to reductions of surface charge density. we confirmed this result with derivative of C-V characteristic, leakage current density. The maximum capacitance and leakage current density were respectively decreased about 4 pF, 60% after annealing. The average of low-k value is approximatly 2.07 after annealing.

Plasma Enhanced Thermal Nitridation of $SiO_2$ for VLSI (VLSI를 위한 플라즈마 열적 질산화막의 형성)

  • 이재성;이용현;최시영;이덕동
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.11
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    • pp.1699-1705
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    • 1989
  • Nitridation of about 300\ulcornerSiO2 filmss thermally grown on Si was performed in NH3 plasm ambient (0.2-2 torr) at 900\ulcornerC-1100\ulcorner for 15-20 minutes. The peoperties of those films have been investigated by analyzing the AES and the SIMS data, and the results of the I-V and the C-V measurements. At the plasma ambient of less than 1.5 torr pressure, etching of the films have been shown. Above the 1.5 torr pressure, however, SiO2 films were nitrided as SiIxNy. Plasma thermal nitridation of SiO2 by addition of small amount (6%) of CF4 to the NH3 showed higher pile-up N concentration in the surface region of SiOxNy film. The higher the nitridation temperature is and the longer the nitridation time is the larger the dielectric constant is. The plasma thermal nitridation of silicon dioxide on silicon causes the flat-band voltage shift based on the formation of the positive charge. The conduction mechanism for SiOxNy films could be elucidated by Fowler-Nordheim tnneling model. By SIMS analysis, surface of the film nitrided in plasma process has less contamination than that of the film nitrided in open-tube process.

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Dielectric Characteristics of $Ta_2O_5$ Thin Films Prepared by ECR-PECVD (ECR-플라즈마 화학 증착법에 의해 제조된 $Ta_2O_5$ 박막의 유전 특성)

  • 조복원;안성덕;이원종
    • Journal of the Korean Ceramic Society
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    • v.31 no.11
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    • pp.1330-1336
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    • 1994
  • Ta2O5 films were deposited on the p-Si(100) substrates by ECR-PECVD and annealed in O2 atmosphere. The thicknesses of Ta2O5/SiO2 layers were measured by an ellipsometer and a cross-sectional TEM. Annealing in O2 atmosphere enhanced the stoichiometry of the Ta2O5 film and reduced the impurity carbon content. Ta2O5 films were crystallized at the annealing temperatures above 75$0^{\circ}C$. The best leakage current characteristics and the maximum dielectric constant of Ta2O5/SiO2 film capacitor were observed in the specimen annealed at $700^{\circ}C$ and 75$0^{\circ}C$, respectively. The flat band voltage of the Al/Ta2O5/SiO2/p-Si MOS capacitor was varied in the range of -0.6~-1.6 V with the annealing temperature. The conduction mechanism in the Ta2O5 film, the variation of the effective oxide charge density with the annealing temperature, and the effective electric field distribution in the Ta2O5/SiO2 double layer were also discussed.

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$Ta/TaN_x$ Metal Gate Electrodes for Advanced CMOS Devices

  • Lee, S. J.;D. L. Kwong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.3
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    • pp.180-184
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    • 2002
  • In this paper, the electrical properties of PVD Ta and $TaN_x$ gate electrodes on $SiO_2$ and their thermal stabilities are investigated. The results show that the work functions of $TaN_x$ gate electrode are modified by the amount of N, which is controlled by the flow rate of $N_2$during reactive sputtering process. The thermal stability of Ta and $TaN_x$ with RTO-grown $SiO_2$ gate dielectrics is examined by changes in equivalent oxide thickness (EOT), flat-band voltage ($V_{FB}$), and leakage current after post-metallization anneal at high temperature in $N_2$ambient. For a Ta gate electrode, the observed decrease in EOT and leakage current is due to the formation of a Ta-incorporated high-K layer during the high temperature annealing. Less change in EOT and leakage current is observed for $TaN_x$ gate electrode. It is also shown that the frequency dispersion and hysteresis of high frequency CV curves are improved significantly by a post-metallization anneal.

Electricial properties of oxynitride films prepared by furnace oxidation in $N_2O$ ($N_2O$ 가스에서 형성된 oxynitride막의 전기적 특성)

  • Bae, Sung-Sig;Seo, Yong-Jin;Kim, Tae-Hyung;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1992.11a
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    • pp.90-93
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    • 1992
  • In this paper, MOS characteristics of gate dielectrics prepared by furnace oxidation of Si in an $N_2O$ ambient have been studied. Compared with the oxides grown in $O_2$, $N_2O$ oxides show significantly improved breakdown field and low flat band voltage. Also, $N_2O$ oxide is more controllable for ultrathin film growth than $O_2$ oxide. This improvement is caused by nitrogen incorporation into the $N_2O$ oxide. Therefore, the nitrogen-rich-layer at the Si/$SiO_2$ interface formed during $N_2O$ oxidation not only strengthen $N_2O$ oxide structure at the interface and improves the gate dielectric quality, it also acts as a oxidant diffusion barrier that reduces the oxidation rate significantly.

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Analysis of Trap Dependence on Charge Trapping Layer Thickness in SONOS Flash Memory Devices Based on Charge Retention Model (전하보유모델에 기초한 SONOS 플래시 메모리의 전하 저장층 두께에 따른 트랩 분석)

  • Song, Yu-min;Jeong, Junkyo;Sung, Jaeyoung;Lee, Ga-won
    • Journal of the Semiconductor & Display Technology
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    • v.18 no.4
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    • pp.134-137
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    • 2019
  • In this paper, the data retention characteristics were analyzed to find out the thickness effect on the trap energy distribution of silicon nitride in the silicon-oxide-nitride-oxide-silicon (SONOS) flash memory devices. The nitride films were prepared by low pressure chemical vapor deposition (LPCVD). The flat band voltage shift in the programmed device was measured at the elevated temperatures to observe the thermal excitation of electrons from the nitride traps in the retention mode. The trap energy distribution was extracted using the charge decay rates and the experimental results show that the portion of the shallow interface trap in the total nitride trap amount including interface and bulk trap increases as the nitride thickness decreases.