• Journal of the Korean institute of surface engineering
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• v.38 no.2
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• pp.49-54
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• 2005

Flexible copper clad laminates (FCCL) fabricated by sputtering has advantages in fine pitch etching and dimensional accuracy than previous casting or laminating type FCCL, But its lower adhesion is inevitable technical challenge to solve for commercializing it. Chromium (Cr) which strongly reacts with O moiety was used as tie-coating layer in order to improve low adhesion between copper (Cu) and polyimide (PI). Sputtering raw polyimide (SRPI) and casting raw polyimide (CRPI) were used as substrates at this research. PI was pretreated by plasma before sputtering, and each sample was varied with RF power and Cr thickness on sputtering. Peel strength of the FCCL on SRPI was higher than that on CRPI. Adhesion had maximum value when 10 nm of Cr was deposited on SRPI by RF power of 50 W. It seems to be by the formation of Cu-Cr-O solid solution at the metal-PI interface.

• Design & Manufacturing
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• v.10 no.2
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• pp.50-54
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• 2016

In the semiconductor industry the final products were checked for several environments before sell the products. The burning test of memory and chip was implemented in reliability for all of parts. The memory and chip were developed to high density memory and high performance chip, so circuit design was also high integrated and the test bed was needed to be thin and fine pitch socket. LGA(Land Grid Array) IC socket with thin wall thickness was designed to satisfy this requirement. The LGA IC socket plastic part was manufacture by injection molding process, it was needed accuracy, stiffness and suit resin with high flowability. In this study, injection molding process analysis was executed for 2 and 4 cavities moldings with runner, gate and sprue. The warpage analysis was also implemented for further gate removal process. Through the analyses the total deformations of the moldings were predicted within maximum 0.05mm deformation. Finally in consideration of these results, 2 and 4 cavities molds were designed and made and tested in injection molding process.

• International Journal of Aeronautical and Space Sciences
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• v.18 no.3
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• pp.565-573
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• 2017

This paper presents a multistage in-flight alignment (MIFA) method for a strapdown inertial navigation system (SDINS) suitable for moving vehicles with no initial attitude references. A SDINS mounted on a moving vehicle frequently loses attitude information for many reasons, and it makes solving navigation equations impossible because the true motion is coupled with an undefined vehicle attitude. To determine the attitude in such a situation, MIFA consists of three stages: a coarse horizontal attitude, coarse heading, and fine attitude with adaptive Kalman navigation filter (AKNF) in order. In the coarse horizontal alignment, the pitch and roll are coarsely estimated from the second order damping loop with an input of acceleration differences between the SDINS and GPS. To enhance estimation accuracy, the acceleration is smoothed by a scalar filter to reflect the true dynamics of a vehicle, and the effects of the scalar filter gains are analyzed. Then the coarse heading is determined from the GPS tracking angle and yaw increment of the SDINS. The attitude from these two stages is fed back to the initial values of the AKNF. To reduce the estimated bias errors of inertial sensors, special emphasis is given to the timing synchronization effects for the measurement of AKNF. With various real flight tests using an UH60 helicopter, it is proved that MIFA provides a dramatic position error improvement compared to the conventional gyro compass alignment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.323-327
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• 2004

The bubble flow from the wafer surface during plating process was studied in this paper. The plating shape in the opening of photoresist becomes gradated shape in the fountain plating system, because bubbles from the wafer surface are difficult to escape from the deep openings, vias. So, we designed the tilted electrode ring contact to get uniform bump height on all over the wafer and evaluated the film uniformity by SEM and ${\alpha}-step$. In ${\alpha}-step$ measurement, film uniformities in the fountain plating system and the tilted electrode ring contact system were ${\pm}16.6%,\;{\pm}4%$ respectively.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.4
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• pp.1-7
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• 2018

As the performance and density of IC (integrated circuit) devices increase, power and signal integrities in the global interconnects of advanced packaging technologies are becoming more difficult. Thus, the global interconnect technologies should be designed to accommodate increased input/output (I/O) counts, improved power grid network integrity, reduced RC delay, and improved electrical crosstalk stability. This requirement resulted in the fine-pitch interconnects with a low-k dielectric in 3D packaging or wafer level packaging structure. This paper reviews an organic-inorganic hybrid material as a potential dielectric candidate for the global interconnects. An organic-inorganic hybrid material called polysiloxane can provide spin process without high temperature curing, an excellent dielectric constant, and good mechanical properties.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.1
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• pp.49-54
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• 2023

Recently, System in Packaging(SIP) technology needs to meet high frequency (5G and more) communication technology and fine pitch surface treatment. The conventional Electroless Ni/Immersion Au plating(ENIG) is not suitable for high frequency range because of magnetic properties are increasing the transmission loss. Without nickel plating layer, the pattern and pad reliability level must be meet the condition. In this review paper, we investigated research trends on Ni-less surface treatment technology for high-frequency communication and frequency characteristics according to materials.

• Journal of the Korean Society for Precision Engineering
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• v.11 no.5
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• pp.180-188
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• 1994

Error assessment and evaluation for machine for machine tool slides have been considered as essential tools for improving accuracy. In this paper, a computer aided measurement technique is proposed using photo pin diodes of quadrant type and laser source. In thedeveloped system, three photo diodes are mounted on a sensor mounting table, and the sensored signal is processed by specially designed signal conditioner to give fine resolution with minimum noise. A micro computer inputs the processed signal, and the geometric errors of five degree of freedoms are successfully evaluated. Pitch, roll, yaw, vertical and horizontal straightness errors are thus assessed simultaneously for a machine tool slide. Calibration techniques such as optics calibration, photo diode calibration are proposed and implemented, giving precise calibration for the measurement system. The developed system has been applied to a practical machine tool slide, and has been found as one of efficient and precise technique for machine tool slide.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.1-5
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• 2010

We developed a novel micro-electro mechanical systems (MEMS) test socket using silicon on insulator (SOI) substrate with the cantilever array structure. We designed the round shaped cantilevers with the maximum length of $350{\mu}m$, the maximum width of $200{\mu}m$ and the thickness of $10{\mu}m$ for $650{\mu}m$ pitch for 8 mm x 8 mm area and 121 balls square ball grid array (BGA) packages. The MEMS test socket was fabricated by MEMS technology using metal lift off process and deep reactive ion etching (DRIE) silicon etcher and so on. The MEMS test socket has a simple structure, low production cost, fine pitch, high pin count and rapid prototyping. We verified the performances of the MEMS test sockets such as deflection as a function of the applied force, path resistance between the cantilever and the metal pad and the contact resistance. Fabricated cantilever has 1.3 gf (gram force) at $90{\mu}m$ deflection. Total path resistance was less than $17{\Omega}$. The contact resistance was approximately from 0.7 to $0.75{\Omega}$ for all cantilevers. Therefore the test socket is suitable for BGA integrated circuit (IC) packages tests.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.4
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• pp.9-15
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• 2009

Compared to the flip-chip process using solder bumps, Cu pillar bump technology can accomplish much finer pitch without compromising stand-off height. Flip-chip process with Cu pillar bumps can also be utilized in radio-frequency packages where large gap between a chip and a substrate as well as fine pitch interconnection is required. In this study, Cu pillars with and without Sn caps were electrodeposited and flip-chip-bonded together to form the Cu-Sn-Cu sandwiched joints. Contact resistances and die shear forces of the Cu-Sn-Cu sandwiched joints were evaluated with variation of the height of the Sn cap electrodeposited on the Cu pillar bump. The Cu-Sn-Cu sandwiched joints, formed with Cu pillar bumps of $25-{\mu}m$ diameter and $20-{\mu}m$ height, exhibited the gap distance of $44{\mu}m$ between the chip and the substrate and the average contact resistance of $14\;m{\Omega}$/bump without depending on the Sn cap height between 10 to $25\;{\mu}m$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.3
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• pp.503-510
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• 2006

Readout circuit is to convert signal occurred in a defector into suitable signal for image signal processing. In general, it has to possess functions of impedance matching with perception element, amplification, noise reduction and cell selection. It also should satisfies conditions of low-power, low-noise, linearity, uniformity, dynamic range, excellent frequency-response characteristic, and so on. The technical issues in developing image processing equipment for focal plane way (FPA) can be categorized as follow: First, ultraviolet (UV) my detector material and fine processing technology. Second, ReadOut IC (ROIC) design technology to process electric signal from detector. Last, package technology for hybrid bonding between detector and ROIC. ROIC enables intelligence and multi-function of image equipment. It is a core component for high value added commercialization ultimately. Especially, in development of high-resolution image equipment ROIC, it is necessary that high-integrated and low-power circuit design technology satisfied with design specifications such as detector characteristic, signal dynamic range, readout rate, noise characteristic, ceil pitch, power consumption and so on. In this paper, we implemented a $8\times8$ FPA prototype ROIC for reduction of period and cost. We tested unit block and overall functions of designed $8\times8$ FPA ROIC. Also, we manufactured ROIC control and image boards, and then were able to verify operation of ROIC by confirming detected image from PC's monitor through UART(Universal Asynchronous Receiver Transmitter) communication.