• 제목/요약/키워드: Film Capacitor

검색결과 454건 처리시간 0.027초

Carbon계 Hybrid Capacitor의 전기 화학적 기술 및 Li-ion Battery의 혼성 동력원 특성 (Electrochemical Characteristics of Carbon/Carbon Hybrid Capacitor and Li-ion Battery/Hybrid Capacitor Combination)

  • 이선영;김익준;문성인
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.597-598
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    • 2005
  • Recently, the performance of portable electric equipment can often improved by a Li-ion battery assisted by a supercapacitor. A supercapacitor can provide high power density as well as a low resistance in the hybrid system. In this study, we have prepared, as the pluse power souce, a commercially supplied Li-ion battery with a capacity of 700mAh and AC resistivity of $60m\Omega$ at 1kHz and nonaqeous asymmetric hybrid capacitor composed of an activated carbon cathode and MCMB anode, and have examined the electrochemical characteristics of hybrid capacitor and the pulse performances of parallel connected battery/hybrid capacitor source. The nonaqueous asymmetric hybrid capacitor, the stacks of 10 pairs of the cathode, the porous separator and the anode electrode were housed in Al-laminated film cell. The hybrid capacitor, which was charged and discharged at a constant current at $0.25mA/cm^2$ between 3 and 4.3V, has exhibited the capacitance of 100F. And the equivalent series resistance was $32m\Omega$ at 1kHz. By combining a Li-ion battery and a hybrid capacitor, the pulse performance of battery can be improved 23% in run time under a pulse discharge of 7C-rate.

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Effect of Annealing Atmosphere on the La2O3 Nanocrystallite Based Charge Trap Memory

  • Tang, Zhenjie;Zhao, Dongqiu;Hu, Huiping;Li, Rong;Yin, Jiang
    • Transactions on Electrical and Electronic Materials
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    • 제15권2호
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    • pp.73-76
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    • 2014
  • $Pt/Al_2O_3/La_2Si_5O_x/SiO_2/Si$ charge trap memory capacitors were prepared, in which the $La_2Si_5O_x$ film was used as the charge trapping layer, and the effects of post annealing atmospheres ($NH_3$ and $N_2$) on their memory characteristics were investigated. $La_2O_3$ nanocrystallites, as the storage nodes, precipitated from the amorphous $La_2Si_5O_x$ film during rapid thermal annealing. The $NH_3$ annealed memory capacitor showed higher charge storage performances than either the capacitor without annealing or the capacitor annealed in $N_2$. The memory characteristics were enhanced because more nitrogen was incorporated at the $La_2Si_5O_x/SiO_2$ interface and interfacial reaction was suppressed after the $NH_3$ annealing treatment.

금속씨앗층과 $N_2$ 플라즈마 처리를 통한 Al/CeO$_2$/Si 커패시터의 유전 및 계면특성 개선 (Improvement of dielectric and interface properties of Al/CeO$_2$/Si capacitor by using the metal seed layer and $N_2$ plasma treatment)

  • 임동건;곽동주;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.326-329
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    • 2002
  • In this paper, we investigated a feasibility of cerium oxide(CeO$_2$) films as a buffer layer of MFIS(metal ferroelectric insulator semiconductor) type capacitor. CeO$_2$ layer were Prepared by two step process of a low temperature film growth and subsequent RTA (rapid thermal annealing) treatment. By app1ying an ultra thin Ce metal seed layer and N$_2$ Plasma treatment, dielectric and interface properties were improved. It means that unwanted SiO$_2$ layer generation was successfully suppressed at the interface between He buffer layer and Si substrate. The lowest lattice mismatch of CeO$_2$ film was as low as 1.76% and average surface roughness was less than 0.7 m. The Al/CeO$_2$/Si structure shows breakdown electric field of 1.2 MV/cm, dielectric constant of more than 15.1 and interface state densities as low as 1.84${\times}$10$\^$11/ cm$\^$-1/eV$\^$-1/. After N$_2$ plasma treatment, the leakage current was reduced with about 2-order.

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The Effect of Anodizing on the Electrical Properties of ZrO2 Coated Al Foil for High Voltage Capacitor

  • Chen, Fei;Park, Sang-Shik
    • Applied Science and Convergence Technology
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    • 제24권2호
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    • pp.33-40
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    • 2015
  • $ZrO_2$ and Al-Zr composite oxide film was prepared by vacuum assisted sol-gel dip coating method and anodizing. $ZrO_2$ films annealed above $400^{\circ}C$ have tetragonal structure. $ZrO_2$ layers inside etch pits were successfully coated from the $ZrO_2$ sol. The double layer structures of samples were obtained after being anodized at 100 V to 600 V. From the TEM images, it was found that the outer layer was $Al_2O_3$, the inner layer was multi-layer of $ZrO_2$, Al-Zr composite oxide and Al hydrate. The capacitance of $ZrO_2$ coated foil exhibited about 28.3% higher than that of non-coating foil after being anodized at 100 V. The high capacitance of $ZrO_2$ coated foils anodized at 100 V can be attributed to the relatively high percentage of inner layer in total thickness. The electrical properties, such as withstanding voltage and leakage current of coated and non-coated Al foils showed similar values. From the results, $ZrO_2$ and Al-Zr composite oxide is promising to be used as the partial dielectric of high voltage capacitor to increase the capacitance.

$RuO_2$전극 위에 증착된 ALD-$Al_2O_3$ MIM 커패시터 특성 (Characteristics of ALD-$Al_2O_3$ MIM Capacitor on $RuO_2$ Metal Electrode)

  • 도승우;문경호;장철영;정영철;이재성;이용현
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.143-144
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    • 2005
  • Recently, MIM(metal-insulator-metal) capacitor is one of the essential device for DRAM device. In this thesis, $Al_2O_3$ thin film which has a relatively high dielectric constant was deposited by ALD(atomic layer deposition) using MPTMA and $H_2O$ source. Deposition temperature of $Al_2O_3$ thin film was $200^{\circ}C$ and its thickness was 300 ${\AA}$. $RuO_2$ bottom electrode was deposited by RF-magnetron sputtering using $RuO_2$ target. The physical characteristics of $Al_2O_3$ films were investigated by AES, TEM and Ellipsometry. Electrical characteristics were analyzed by C-V and I-V measurement.

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$Ta_2O_{5}$ 커패시터 박막의 유전 특성과 열 안정성에 관한 연구 (The Study on Dielectric Property and Thermal Stability of $Ta_2O_{5}$ Thin-films)

  • 김인성;이동윤;송재성;윤무수;박정후
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제51권5호
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    • pp.185-190
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    • 2002
  • Capacitor material utilized in the downsizing passive devices and dynamic random access memory(DRAM) requires the physical and electrical properties at given area such as capacitor thickness reduction, relative dielectric constant increase, low leakage current and thermal stability. Common capacitor materials, $SiO_2$, $Si_3N_4$, $SiO_2$/$Si_3N_4$,TaN and et al., used until recently have reached their physical limits in their application to several hundred angstrom scale capacitor. $Ta_2O_{5}$ is known to be a good alternative to the existing materials for the capacitor application because of its high dielectric constant (25 ~35), low leakage current and high breakdown strength. Despite the numerous investigations of $Ta_2O_{5}$ material, there have little been established the clear understanding of the annealing effect on capacitance characteristic and conduction mechanism, design and fabrication for $Ta_2O_{5}$ film capacitor. This study presents the structure-property relationship of reactive-sputtered $Ta_2O_{5}$ MIM capacitor structure processed by annealing in a vacuum. X-ray diffraction patterns skewed the existence of amorphous phase in as-deposited condition and the formation of preferentially oriented-$Ta_2O_{5}$ in 670, $700^{\circ}C$ annealing. On 670, $700^{\circ}C$ annealing under the vacuum, the leakage current decrease and the enhanced temperature-capacitance characteristic stability. and the leakage current behavior is stable irrespective of applied electric field. The results states that keeping $Ta_2O_{5}$ annealed at vacuum gives rise to improvement of electrical characteristics in the capacitor by reducing oxygen-vacancy and the broken bond between Ta and O.

HVDC 서브모듈용 커패시터의 고장 분석 (Failure analysis of capacitor for sub-module in HVDC)

  • 강필순;송성근
    • 전기전자학회논문지
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    • 제22권4호
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    • pp.941-947
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    • 2018
  • 일반적으로 커패시터는 빈번한 충 방전으로 시스템의 수명에 큰 영향을 미친다. 본 논문에서는 고전압, 대전류의 HVDC 서브모듈용 필름 커패시터의 핵심 고장원인을 분석하여 커패시터의 설계 및 제조공정의 주의사항을 분석한다. 먼저 커패시터의 FMEA 수행을 통해 고장원인, 고장모드, 고장영향에 대해 분석한다. 커패시터의 고장에 가장 큰 영향을 주는 고장원인과 영향을 정량적으로 평가하기 위해 커패시터에 대한 고장나무(Fault-tree)를 제시하고 설계인자와 구동환경의 조건에 따른 고장률을 분석한다. 커패시터 고장의 핵심 원인이 커패시턴스 변화에 있음을 확인하고, 커패시터의 고장률 저감을 위해서 커패시터의 설계와 제조공정 중 온도상승, 코로나 발생, 전극팽창, 절연거리 감소를 최소화할 필요가 있음을 검증한다.

절연형 단상 태양광 PCS의 직류링크 커패시터 저감 (Reduction of DC-link Capacitance for Single-Phase Transformerless Photovoltaic Power Converters)

  • 누옌황부;이동춘
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2016년도 전력전자학술대회 논문집
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    • pp.365-366
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    • 2016
  • This paper presents a single-phase transformerless photovoltaic (PV) power converter systems based on the AC/DC boost inverter, which is capable of solving the leakage current and second-order ripple power issues. By eliminating the inherent ripple power in single-phase inverter, the bulky electrolytic capacitor can be replaced by a small film capacitor. The validity of the proposed scheme has been verified by the simulation results.

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Minimization of DC-Link Capacitance for NPC Three-level PWM Converters

  • Alemi, Payam;Lee, Dong-Choon
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2011년도 전력전자학술대회
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    • pp.370-371
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    • 2011
  • This paper presents a control algorithm that minimizes the DC-link capacitance by decreasing the capacitor current. The capacitor current can be nullified by a feedback compensation term which is calculated from the power balance in the AC/DC converter. As a result, voltage variation in the DC-link is reduced further, which makes a large reduction in the size of DC-link capacitors which are expensive and have limitations in life time. Simulations are performed with two 80uF DC-link capacitors, which can be replaced by film capacitors.

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Piezo-Capacitor방식 입력 Transducer와 출력특성 고찰 (Study of Output Characteristics of Pressure T/D using Piezo Capacitor Type)

  • 이성재;유병기
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.245-246
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    • 2009
  • 정전용량형 후막 스트레인 게이지(piezocapacitive thick film strain gage)는 세라믹 ($Al_2O_3$)을 주 원료로 하는 지지대(약 5mm)와 다이어프램(약 $300{\mu}m$) 그리고 가드 링으로 구성된다. 전극 판은 도전성 페이스트를 이용하여 지지대와 다이어프램에 형성되었으며 극판 사이에는 유전체 메이스트를 사용하여 스크린 인쇄로 후막을 형성하였다. 극판 사이의 가드 링 두께는 약 $30{\mu}m$정도로 다이어프램의 변위 최대값을 유지시키는 데 필요한 간격이다. 따라서 정전용랑형 후막 스트레인 게이지는 지지대를 중심으로 다이어프램에 압력 (0.5~1.0bar)이 인가될 때 변위를 발생시키면서 커패시터 값이 압력의 크기에 따라 비례 특성을 가지고 변화하는 것을 이용한 것이다. 압력이 없을때 초기값은 35pF~40pF 정도이고 정격압력의 최대치를 인가시켰을 때 약 55pF~55p를 나타내었다.

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