• Title/Summary/Keyword: Feedback Circuit

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Design of a Frequency Oscillator Using A Novel DGS (새로운 DGS 구조를 이용한 주파수 발진기 설계)

  • Joung, Myung-Sup;Kim, Jong-Ok;Park, Jun-Seok;Lim, Jae-Bong;Cho, Hong-Goo
    • Proceedings of the KIEE Conference
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    • 2003.07c
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    • pp.1955-1957
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    • 2003
  • This paper presents a novel defected ground structure (DGS) and its application to a microwave oscillator. The presented oscillator is designed so as to use the suggested defected ground structure as a feedback loop inducing a negative resistance as well as a frequency-selective circuit. Applying the feedback loop between the drain and the gate of a FET device produces precise phase conversion in the feedback loop. The equivalent circuit parameters of the DGS are extracted by using a three-dimensional EM calculations and simple circuit analysis method. The implemented 1.07 GHz oscillator exhibits 0 dBm output power with over 15% dc-to-RF power efficiency and -106 dBc/Hz phase noise at 100 kHz offset from carrier.

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Design Optimization of Hybrid-Integrated 20-Gb/s Optical Receivers

  • Jung, Hyun-Yong;Youn, Jin-Sung;Choi, Woo-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.443-450
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    • 2014
  • This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

Single-Inductor Multiple-Output DC-DC Converter with Negative Feedback Selection Circuit (부궤환 선택회로를 갖는 단일 인덕터 다중 출력 직류-직류 변환기)

  • Gong, Jung-Chul;Roh, Yong-Seong;Moon, Young-Jin;Choi, Woo-Seok;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.23-30
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    • 2011
  • This paper presents a Single-Inductor Multiple-Output (SIMO) DC-DC Converter with a negative feedback selection circuit to improve a regulation property at light load and to generate independent multiple outputs. The conventional SIMO DC-DC converter with a fixed negative feedback circuit cannot regulate correctly at light load. The SIMO DC-DC converter with the proposed negative feedback selection circuit has been designed in 0.35um 2-poly 3-metal BCDMOS. This converter is dual output boost converter with the 1.5V input and 2.5V, 3.0V output. The power conversion efficiency varies from 59% at 10mA loads to 85% at 50mA loads.

A low-Gain Error Amplifier for Common-Mode Feedback Circuit (Common Mode Feedback 회로를 위한 저 증폭도 에러증폭기)

  • 정근정;노정진
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.9
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    • pp.714-723
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    • 2003
  • An effective technique to increase the signal swing and reduce noise is to use fully-differential -circuits. However, design of a common-mode feedback (CMFB) circuit that stabilizes the common-mode output level is essential. In this paper, a general description is given to fully-differential amplifiers with their CMFB loops, then a new error amplifier that is just composed of transistors and stabilizes the DC output level is proposed. We designed a simple and efficient bias circuit that allows the stability and maximum input swing. Simulation result shows the enhanced phase margin and increased differential-mode input swing with a proposed error amplifier.

Oscillation Frequency Estimation of Feedback Bridging Faults for Test Circuit Design

  • Yamamoto, Sou;Hashizum, Masakie;Yotsuyanagi, Hiroyuki;Tamesada, Takeomi
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.343-346
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    • 2000
  • When a feedback bridging fault is activated, oscillation may be generated in output signal lines. If the oscillation is generated, the fault may not be detected by logic testing. Thus, in the past we proposed a current sensor to detect feedback bridging faults by supply current testing. The sensor circuit design requires the maximum frequency of oscillation which is generated when feedback bridging fault is excited as a specification. In this paper, an estimation method of the oscillation frequency is proposed. Also, it is shown by some experiments that the frequency obtained by the method can be used for the sensor design.

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Design of LCD Backlight Driver IC to improve the Brightness Uniformity (LCD Backlight의 휘도 균일성을 개선한 인버터 드라이버 IC 설계)

  • Oh Myeong-Woo;Yang Sung-hyun;Cho Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.4 s.334
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    • pp.53-60
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    • 2005
  • This work Proposes and describes an LCD backlight driver IC using a voltage feedback circuit which improves the brightness uniformity. The proposed circuit controls the brightness of a backlight by amplifying of sampling voltage at a lamp. To keep the uniformity of brightness, the circuit has a reference lamp. The output voltage of the reference lamp is supplied commonly to each lamp that reduces a resistance deviation of the lamps. As a result, the proposed circuit shows brightness uniformity improvement of about $40\%$ compared to the conventional ones.

Macro Modeling of a Feedback Field-effect Transistor (피드백 전계 효과 트랜지스터의 메크로 모델링 연구)

  • Oh, Jong Hyeok;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.10a
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    • pp.634-636
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    • 2021
  • In this study, we studied the macro-modeling of an feedback field-effect transistor (FBFET) using SPICE simulation. The previously presented macro-model of the FBFET is consisting of two circuits. one is charge integration circuit, and the other is current generation circuit. The previous current generation circuit has problem that can't predict performance accurately of the circuits, due to implementing only IDS-VGS characteristics. To solve this problem, we presents a model that can implement not only IDS-VGS characteristics but alos IDS-VDS characteristics by adding the diode in the current generation circuit.

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A Study on Single-bit Feedback Multi-bit Sigma Delta A/D converter for improving nonlinearity

  • Kim, Hwa-Young;Ryu, Jang-Woo;Jung, Min-Chul;Sung, Man-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.57-60
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    • 2004
  • This paper presents multibit Sigma-Delta ADC using Leslie-Singh Structure to Improve nonlinearity of feedback loop. 4-bit flash ADC for multibit Quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. Thus a Sigma-Delta ADC usually adds the dynamic element matching digital circuit within feedback loop. It occurs complexity of Sigma-Delta Circuit and increase of power dissipation. In this paper using the Leslie-Singh Structure for improving nonliearity of ADC. This structure operate at low oversampling ratio but is difficult to achieve high resolution. So in this paper propose improving loop filter for single-bit feedback multi-bit quantization Sigma-Delta ADC. It obtained 94.3dB signal to noise ratio over 615kHz bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is fabricated in 0.25um CMOS technology with 2.5V supply voltage.

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Hydrogen Detecting Characteristics of the $WO_3$ Films Using the R/V Converting Circuit (저항-전압변환회로를 이용한 $WO_3$ 박막의 수소검지 특성 측정)

  • Rhie, Dong-Hee;Koh, Jung-Hyuk;Kim, Young-Hwan;Sung, Yung-Kwon
    • Proceedings of the KIEE Conference
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    • 1998.11c
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    • pp.767-769
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    • 1998
  • Using the R/V converting circuit, hydrogen detecting characteristics of the $WO_3$ films were investigated. The R/V converting circuit is configured with the equivalently constant current driving method connecting an unknown resistor to be measured in the feedback loop of the or-amr rather than using a separated constant current circuit. The response time of the reference voltage for the R/V converting circuit was simulated by the circuit simulator "SABER", and it was found that the response time in the high resistance range become longer and the error amounts to 10%. From the simulation results. replacing the capacitor in the feedback loop of the second stage or-amp with a 0.001uF capacitor, when measuring in the high resistance range, the response characteristics are remarkably improved. The response time was shortened from about 10 seconds to below 1 second. Using this circuit, the effect of $WO_3$ films deposited by sputtering method on hydrogen was measured.

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A Feedback Circuit of Effective Wireless Power Transfer for Low Power System

  • Lho, Young Hwan
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.480-483
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    • 2018
  • Wireless power transfer (WPT) is the technology that forces the power to transmit electromagnetic field to an electrical load through an air gap without interconnecting wires. This technology is widely used for the applications from low power smartphone to high power electric railroad. In this paper, the model of wireless power transfer circuit for the low power system is designed for a resonant frequency of 13.45 MHz. Also, a feedback WPT circuit to improve the power transfer efficiency is proposed and shown better performance than the original open WPT circuit, and the methodology for power efficiency improvement is studied as the coupling coefficient increases above 0.01, at which the split frequency is made.