• Transactions on Electrical and Electronic Materials
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• 제11권4호
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• pp.190-193
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• 2010

This report covers an effective fabrication method of graphene nanoribbon for top-gated field effect transistors (FETs) utilizing electron beam lithography with a bi-layer resists (XR-1541/poly methtyl methacrylate) process. To improve the variation of the gating properties of FETs, the residues of an e beam resist on the graphene channel are successfully taken off through the combination of reactive ion etching and a lift-off process for the XR-1541 bi-layer. In order to identify the presence of graphene structures, atomic force microscopy measurement and Raman spectrum analysis are performed. We believe that the lift-off process with bi-layer resists could be a good solution to increase gate dielectric properties toward the high quality of graphene FETs.

• 한국광학회지
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• 제3권4호
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• pp.273-279
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• 1992

수치제어 공작기계와 로보트 등에서의 위치판독장치는 핵심적인 자동화부품이다. 수치제어용 위치판독장치인 광학식 에코더의 제조기술의 국산화를 위하여 부분 공정을 개발하였다. Microlithography 가공기술을 이용하여 유리 기저판 위에 정밀눈금을 가공하였다. 눈금가공 공정은 많은 단계의 과정을 거쳐 이루어 진다. 박막두계, 수지코팅, 건조온도, 노광시간, 부식시간 등 공정변수들의 최적조건을 찾아내고 각 공정변수에 따른 눈금품직과의 관계를 규명하였다.

• 한국공작기계학회논문집
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• 제16권6호
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• pp.168-174
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• 2007

A ceramic glass mold was developed for micro hot-embossing and replicated polymer parts are fabricated. The glass-ceramic micro mold could be fabricated with a laser process and a wet etching process and the fabrication time could be saved a lot. Various polymer micro structures can be obtained by hot-embossing. The process parameters such as ho-embossing temperatures or pressures were investigated and optimized. This process can be applied for fabrication of micro structures for flip-chips or micro fluidic channels for bio-engineering. The advantages and disadvantages of this process are discussed, too.

• 소성∙가공
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• 제28권5호
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• pp.275-280
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• 2019

The aim of this study is to fabricate an ultra-fine pure rhodium wire using multi-pass wire drawing process. To manufacture $30{\mu}m$ ultra-fine rhodium wire from the initial $50{\mu}m$ wire, a multi-pass wire drawing process was designed based on the uniform reduction ratio theory. The elastic-plastic finite element analysis was then conducted to validate the efficacy of the designed process. The drawing load, drawing stress, and the distribution of the effective strain were evaluated using the finite element analysis. Finally, the wire drawing experiment was performed to validate the designed wire drawing process. From the results of the experiment, the diameter of the final drawn wire was found to be $29.85{\mu}m$.

• 멤브레인
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• 제34권1호
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• pp.79-86
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• 2024

고분자 분리막의 대표적인 형태 중 하나인 평판형 분리막은 제조가 용이하여 실험실에서 분리막 소재 연구에서부터 실제 상용 분리막 생산에 이르기까지 널리 활용되는 분리막의 형태이다. 정밀여과 및 한외여과 등에 사용되는 평판형의 다공성 고분자 분리막은 주로 상분리 공정을 통해 제조할 수 있으며, 여기에는 비용매 유도 및 증기 유도 상분리 공정이 활용된다. 그러나 상분리 공정 특성상 주변 환경과 실험자에 따라 샘플 간 편차가 쉽게 발생하여 재현성의 확보가 어려운 점이 있다. 따라서 개발된 제조기술을 스케일업 및 재현성 확보를 위해 제어된 환경에서 연속식 대면적 제조가 가능한 롤투롤 제조장치가 필요하며, 본 연구에서는 실험실 스케일의 제조기술을 나이프 및 슬롯다이 롤투롤 공정으로 스케일 업 했을 때 나타나는 제조 환경 차이에 따른 분리막의 특성 변화를 비교하였다. 최종적으로 연속식 제조공정 인자에 대한 최적화를 통해 대면적 제조 시 분리막의 균일성을 확보하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.834-838
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• 2004

We report on a simple method of fabricating multimode transflective liquid crystal displays (LCDs) using the photoalignment technique. Using a self-masking process of ultraviolet light by the reflector as a photomask as well as a reflective mirror, the periodic multimode is obtained with no additional fabrication processes. Moreover, variations of the cell gap are not required for such trasflective LCDs

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.769-772
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• 2004

We report on the developed fabrication method of lanthanide-doped xerogel/porous anodic alumina structures for an image formation via the aluminum anodization, the sol-gel synthesis, and the photolithography process. The structures of europium- or terbium-doped xerogel/porous anodic alumina are also considered in view of application in electroluminescent devices.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회 2001년도 추계학술대회 논문집
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• pp.298-301
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• 2001

In semiconductor manufacturing, wafer fabrication is the most complicated and important process, which is composed of several hundreds of process steps and several hundreds of machines involved. The productivity of the manufacturing mainly depends on how well they control balance of WIP flow to achieve maximal throughput under short manufacturing cycle time. In this paper mathematical formulation is suggested for the stepper scheduling, in which cycle time reduction and maximal production is achieved.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.222-225
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• 2008

We proposed the dry etching process recipe for the fabrication of In-Ga-Zn-O (IGZO)-based oxide TFTs, in which the etching behaviors of IGZO films were systematically investigated when the etching gas mixtures and their mixing ratios were varied. Good device characteristics of the fabricated TFT were successfully confirmed.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2009년도 춘계학술대회 논문집
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• pp.1011-1012
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• 2009