• Proceedings of the Korean Ceranic Society Conference
• /
• 2003.04a
• /
• pp.231.1-231
• /
• 2003

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.7 no.1
• /
• pp.51-55
• /
• 2007

This paper investigates the subthreshold behavior of Fin Field Effect Transistor (FinFET). The FinFET is considered to be an alternate MOSFET structure for the deep sub-micron regime, having excellent device characteristics. As the channel length decreases, the study of subthreshold behavior of the device becomes critically important for successful design and implementation of digital circuits. An accurate analysis of subthreshold behavior of FinFET was done by simulating the device in a 3D process and device simulator, Taurus. The subthreshold behavior of FinFET, was measured using a parameter called S-factor which was obtained from the $In(I_{DS})\;-\;V_{GS}$ characteristics. The value of S-factor of devices of various fin dimensions with channel length $L_g$ in the range of 20 nm - 50 nm and with the fin width $T_{fin}$ in the range of 10 nm - 40 nm was calculated. It was observed that for devices with longer channel lengths, the value of S-factor was close to the ideal value of 60 m V/dec. The S-factor increases exponentially for channel lengths, $L_g\;<\;1.5\;T_{fin}$. Further, for a constant $L_g$, the S factor was observed to increase with $T_{fin}$. An empirical relationship between S, $L_g$ and $T_{fin}$ was developed based on the simulation results, which could be used as a rule of thumb for determining the S-factor of devices.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2012.05a
• /
• pp.67.1-67.1
• /
• 2012

Graphene has attracted much attention for future nanoelectronics due to its superior electrical properties. Owing to its extremely high carrier mobility and controllable carrier density, graphene is a promising material for practical applications, particularly as a channel layer of high-speed FET. Furthermore, the planar form of graphene is compatible with the conventional top-down CMOS fabrication processes and large-scale synthesis by chemical vapor deposition (CVD) process is also feasible. Despite these promising characteristics of graphene, much work must still be done in order to successfully develop graphene FET. One of the key issues is the process technique for gate dielectric formation because the channel mobility of graphene FET is drastically affected by the gate dielectric interface quality. Formation of high quality gate dielectric on graphene is still a challenging. Dirac voltage, the charge neutral point of the device, also strongly depends on gate dielectrics. Another performance killer in graphene FET is source/drain contact resistance, as the contact resistant between metal and graphene S/D is usually one order of magnitude higher than that between metal and silicon S/D. In this presentation, the key issues on graphene-based FET, including organic-inorganic hybrid gate dielectric formation, controlling of Dirac voltage, reduction of source/drain contact resistance, device structure optimization, graphene gate electrode for improvement of gate dielectric reliability, and CVD graphene transfer process issues are addressed.

• Journal of Sensor Science and Technology
• /
• v.32 no.6
• /
• pp.487-495
• /
• 2023

Over the past few decades, considerable research has been conducted on field-effect transistor (FET) biosensors; however, other than electrochemical sensors for pH, they have not reached the commercialization stage and still remain at the basic research level. Although several reports have been published on experiments with real biological samples, no reports exist of developments that have reached commercialization or finalized approval for use. In this paper, we explain the reason for the experiments of FET biosensors to induce spurious signals in an experimental setup and explain the existence of misunderstandings regarding the operating principle of FET biosensors owing to the spurious signals. Based on the thoughtful review of the results of previously published papers, we show that the electrochemical read-out principle of FET biosensors requires our intensive understanding of the interfacial potential between the solution and the sensor electrode for further progress in the FET biosensor research.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.5 no.1
• /
• pp.88-92
• /
• 2010

Bottom gate and top gate field-effect transistor based carbon nanotube(CNT) were fabricated by CMOS process. Carbon nanotube directly grown by thermal chemical vapor deposition(CVD) using Ethylene ($C_2H_4$) gas at $700^{\circ}C$. The growth properties of CNTs on the device were analyzed by SEM and AFM. The electrical transport characteristics of CNT FET were investigated by I-V measurement. Transport through the nanotubes is dominated by holes at room temperature. By varying the gate voltage, bottom gate and top gate field-effect transistor successfully modulated the conductance of FET device.

• Applied Chemistry for Engineering
• /
• v.24 no.1
• /
• pp.1-9
• /
• 2013

As the medical paradigm is changing from disease treatment to disease prevention and an early diagonosis, the demand to develop techniques for the detection of minute concentrations of biomolecules is increasing. Among the various techniques to sense the minute concentration of biomolecules, the biosensors utilizing the matured semiconductor techniques are presented here. To understand such biosensors, the structure and working principle of a MOSFET (Metal-oxide-semiconductor field-effect transistor) which is the basic semiconductor device is firstly introduced, and then the ISFET (Ion sensitive FET), BioFET (Biologically modified FET), Nanowire FET, and IFET (Ionic FET) are introduced, and their applications to biomedical fields are discussed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.35 no.1
• /
• pp.50-57
• /
• 2022

Reliability of CMOS has been severed under aggressive device scaling. Conventional technologies such as lightly doped drain (LDD) and forming gas annealing (FGA) have been applied for better device reliability, but further advances are modest. Alternatively, electro-thermal annealing (ETA) which utilizes Joule heat produced by electrodes in a MOSFET, has been newly introduced for gate dielectric curing. However, concerns about mechanical stability during the electro-thermal annealing, have not been discussed, yet. In this context, this paper demonstrates the mechanical stability of nanosheet FET during the electro-thermal annealing. The effect of mechanical stresses during the electro-thermal annealing was investigated with respect to device design parameters.

• Journal of the Korean Society of Industry Convergence
• /
• v.24 no.6_2
• /
• pp.919-926
• /
• 2021

In this paper, a study was conducted on the miniaturization of an e-Mobility battery charger module using GaN-FET. GaN-FET is one of the types of WBG devices, and it is a device that exceeds the performance of existing Si power semiconductors. In particular, GaN-FET has the advantage of small packaging size and high switching frequency operation, which is advantageous for miniaturization of power converters. Therefore, a bidirectional DC/DC converter module for e-mobility charging using GaN-FET was developed. To apply to the converter to be developed, analysis is performed on the characteristics of GaN-FET, and after manufacturing a prototype of a bidirectional DC/DC converter module, the efficiency and temperature data of the power converter are analyzed to verify its feasibility.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.552-552
• /
• 2012

We fabricated reduced graphene oxide field-effect transistor (RGO-FET) on glass for highly sensitive temperature and IR detection. The device has the channels of RGO responsive to physical stimuli such as temperature and IR. The RGO sensing layers are fabricated from exfoliated graphene oxide sheets that are deposited to form a thin continuous network by electrostatic assembly. These graphene oxide networks are reduced toward reduce graphene oxide by exposure to a hydrazine hydrate vapor. To improve performance and eliminate interferences from oxygen and water vapor absorption to electrical properties of RGO-FET, the sensor devices were encapsulated by the tetratetracontane layer after annealing treatment. The device with encapsulation layer showed lower hysteresis, improved stability, and better repeatability. The temperature response of RGO-FET is examined by measuring changing the temperature, the device exhibited the high sensitivity and repeatability even with the temperature interval of 1 K. We also demonstrated that our devices have capability of IR sensing.

• Advances in nano research
• /
• v.10 no.1
• /
• pp.91-99
• /
• 2021

Silicene is an emerging two-dimensional (2D) semiconductor material which has been envisaged to be compatible with conventional silicon technology. This paper presents a theoretical study of uniformly doped silicene with aluminium (AlSi3) Field-Effect Transistor (FET) along with the benchmark of device performance metrics with other 2D materials. The simulations are carried out by employing nearest neighbour tight-binding approach and top-of-the-barrier ballistic nanotransistor model. Further investigations on the effects of the operating temperature and oxide thickness to the device performance metrics of AlSi3 FET are also discussed. The simulation results demonstrate that the proposed AlSi3 FET can achieve on-to-off current ratio up to the order of seven and subthreshold swing of 67.6 mV/dec within the ballistic performance limit at room temperature. The simulation results of AlSi3 FET are benchmarked with FETs based on other competitive 2D materials such as silicene, graphene, phosphorene and molybdenum disulphide.