• Title/Summary/Keyword: FAB process

Search Result 96, Processing Time 0.031 seconds

Analysis semiconductor FAB line on computer modeling & simulation (컴퓨터 모델링과 시뮬레이션을 통한 반도체 FAB Line 분석)

  • 채상원;한영신;이칠기
    • Proceedings of the Korea Society for Simulation Conference
    • /
    • 2002.11a
    • /
    • pp.115-121
    • /
    • 2002
  • The growth of semiconductor industry attracted to researchers like design, facility technique and making small size chip areas. But nowadays, cause of technology extension and oversupply and price down, yield improvement is the most important point on growth. This paper describes the computer mode]ing technique as the solutions to analyze the problem, to formalize the semiconductor manufacturing process and to build advanced manufacturing environments. The computer models are built referring an existing 8' wafer production line in Korea.

  • PDF

Construction of A Computer Model for FAB of Semiconductor Manufacturing (반도체 FAB 공정에서의 Computer Model 구축)

  • 전동훈
    • Proceedings of the Korea Society for Simulation Conference
    • /
    • 1998.10a
    • /
    • pp.133-136
    • /
    • 1998
  • 본 연구는 복잡하고 다양한 반도체 공저의 모델링을 통하여 반도체 공정 표준화 작업을 목적으로 하고 있다. 급변하는 세계 반도체 시장에서 국내 반도체 업체가 수위를 지킬 수 있는 방안은 공정의 표준화를 제시함으로써 생산업체에서의 신기술 개발에 따른 어려움을 해소하고 기술 개발과 더불어 생산관리 쪽으로의 이동에 대응할 수 있도록 하여 국제 경쟁력을 키워야 할 것이다. 본 연구의 기대효과로는 현장기술자와 장비운용자의 질적 향상을 위한 교육용 자료로의 활용이 가능하다는 것이다. Presentation Tool을 이용한 시청각 교육효과와 시뮬레이션을 이용한 Process Flow Wide View 증진은 현재 국내 반도체 업체들의 신입사원 교육 시 상당한 효과를 거둘 것이라 예상된다. 이는 생산업체에 국한되어지는 것만은 아니며 반도체 공정에 관련된 대학 학과목에서도 활용되어지리라 생각된다. 또한 Modeling & Simulation Tool을 사용하여 공정을 모델링함으로써 표준화를 만든 후 각 제조 업체들은 이러한 모델들은 이용하여 회사의 실정에 맞추어 자사에 대한 시뮬레이션을 손쉽게 수행함으로써 공정 최적화에 따른 경비 절감의 효과를 거둘 수 있을 것이다. 제품별 혹은 같은 제품이라도 Version이 다를 경우 FAB 공정가운데 약 10% 내외만이 바뀌는 점을 감안하면 본 연구를 통해 얻어지는 결과물인 Computer Model과 Simulator는 쉽게 생산현장에 적용할 수 있으리라 여겨진다.

  • PDF

초정밀 반도체 및 TFT-LCD FAB 동적 구조 설계를 위한 PC형 격자보 구조물의 동적 특성 평가 및 개선 방안

  • 손성완;김강부;전종균
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
    • /
    • 2004.05a
    • /
    • pp.195-201
    • /
    • 2004
  • In design stage of high precision manufacture/inspect ion FAB building, it is necessary to investigate the vibration allowable limits of high precision equipment and to study a structure dynamic characteristics of C/R and Sub-structure in order to provide a structure vibration environment to satisfy thess allowable limits. The aim of this study is to investigate the dynamic characteristics of PC-Type mock-up structures designed for next TFT LCD FAB through vibration measurement and analysis procedure, therefore, to provide a proper dynamic structure design for high precision manufacture/inspection work process, which satisfy thess allowable limits.

  • PDF

Manipulation of Perpendicular Anisotropy in FePt Patterned Media for Ultra-high Density Magnetic Recording

  • Kim, Hyun-Su;Noh, Jin-Seo;Roh, Jong-Wook;Chun, Dong-Won;Kim, Sung-Man;Jung, Sang-Hyun;Kang, Ho-Kwan;Jeung, Won-Yong;Lee, Woo-Young
    • Proceedings of the Korean Magnestics Society Conference
    • /
    • 2010.06a
    • /
    • pp.70-71
    • /
    • 2010
  • In this study, We fabricated FePt-based perpendicular patterned media using a selective combination of E-beam lithography and either Ar plasma etching (deposition-first process) or FePt lift-off (deposition-last process). We employed the deposition-last process to avoid chemical and structural disordering by impinging Ar ions (deposition-first process). For a patterned medium with 100 nm patterns made by this process, the out-of-plane coercivity was measured to be 5 fold larger than its in-plane value. The deposition-last process may be a promising way to achieve ultra-high density patterned media.

  • PDF

Construction of an Educational Computer Model for FAB of Semiconductor Manufacturing (반도체 웨이퍼 가공(FAD) 공정에서의 교육용 컴퓨터 모델 구축)

  • Jeon, Dong-Hoon;Lee, Chil-Gee
    • Journal of KIISE:Computing Practices and Letters
    • /
    • v.6 no.3
    • /
    • pp.311-318
    • /
    • 2000
  • The importance of the semiconductor industry in Korea has been growing, but the manufacturers are experiencing two major problems: poor optimization of production and low localization ratio of production equipments. Due to the complex manufacturing processes and special features such as OTD (On Time Delivery) and LIPAS (Line Item Performance Against Schedule) possibilities, several attempts to apply MRP or spreadsheet have been failed to meet the expectations. This paper describes the computer modeling technique as the solutions to analyze the problem, to formalize the semiconductor manufacturing process, and to build an advanced manufacturing environments. The computer simulation models are built referring the FAB facilities of the National Inter - University Semiconductor Research Center to show the FAB processes and the functions of each process.

  • PDF

A Study of Explosion Hazard Proof Modeling for Risk Minimization to Semiconductor & FPD Manufature Equipment and Clean Room (반도체·FPD 제조설비와 클린룸의 RISK 최소화를 위한 폭발위험장소 설정 모델링에 관한 연구)

  • Noh, HyunSeok;Woo, InSung;Hwang, MyungHwan;Woo, JungHwan
    • Journal of the Korean Institute of Gas
    • /
    • v.22 no.1
    • /
    • pp.78-85
    • /
    • 2018
  • In this study, we analyzed risks of the fabrication process equipment and cleanroom for semiconductor/flat panel display (FPD) manufacturing facilities and studied the fundamental safety measures for the risk factors. We examined the explosion proof design models considering the specificity of equipment and environment, and planned to utilize the findings to provide technical standards and grounds for designing and manufacturing related equipment. We believe that this study will contribute to the establishment of technical standards for semiconductor/FPD industry and businesses in many different ways by providing optimized modeling of high-risk explosion site detection, developing safety standards and hazard countermeasures and voluntary activation of safety certification system for operation of fabrication process equipment.

Basic Study on the Assembly Process Design of Curtain-wall System for Minimization of Carbon Emission

  • Yi, June-Seong
    • Journal of the Korea Institute of Building Construction
    • /
    • v.12 no.6
    • /
    • pp.648-663
    • /
    • 2012
  • With recent attempts to improve quality and productivity, the prefabrication manufacturing system has been occupying an increasing share of the construction area. To minimize site work, material is more frequently being produced and partially assembled at a plant, and then installed at a site. For this reason, the production process is being divided and the materials are being delivered to the site after passing through multiple plants. With these changes in the production process, the materials delivery plan is becoming an important management point. In particular, as road transportation using trucks has a 71 percent share of the domestic transportation market, selecting the proper transportation path is important when delivering materials and equipment to a site. But the management system at the project design phase to calculate the delivery cost by considering the production process of the pre-fab material and the $CO_2$ emission at the material delivery phase is currently lacking. This study suggests a process design model for assembly production of the pre-fab material and transportation logistics based on carbon emission. The suggested model can be helpful to optimize the location of the intermediate plant. It is expected to be utilized as a basic model at the project plan and design phase when subcontractors make decisions on items such as materials procurement, selecting the production method, and choosing the location of the assembly plant.

Simulation of Efficient Flow Control for FAB of Semiconductor Manufacturing (반도체 FAB 공정에서의 효율적 흐름제어를 위한 시뮬레이션)

  • 한영신;전동훈
    • Journal of Korea Multimedia Society
    • /
    • v.3 no.4
    • /
    • pp.407-415
    • /
    • 2000
  • The ultimate goal of flow control in the semiconductor fabrication process, one of the most equipment-intensive and complex manufacturing process, is to reduce lead time and work in process. In this paper, we propose stand alone layout in the form of job shop using group technology to improve the Productivity and eliminate the inefficiency in FMS (flexible manufacture system). The performance of stand alone layout and in-line layout are analyzed and compared while varying number of device variable chanties. The analysis of in-line layout is obtained by examining its adoption in the memory products of semiconductor factory. The comparison is performed through simulation using ProSys; a window 95 based discrete system simulation software, as a tool for comparing performance of two proposed layouts. The comparison demonstrates that when the number of device variable change is small, in-line layout is more efficient in terms of production Quantity. However, as the number of device variable change is more than 14 times, stand alone layout prevails over in-line layout.

  • PDF

The Design and Implementation of an Educational Computer Model for Semiconductor Manufacturing Courses (반도체 공정 교육을 위한 교육용 컴퓨터 모델 설계 및 구현)

  • Han, Young-Shin;Jeon, Dong-Hoon
    • Journal of the Korea Society for Simulation
    • /
    • v.18 no.4
    • /
    • pp.219-225
    • /
    • 2009
  • The primary purpose of this study is to build computer models referring overall flow of complex and various semiconductor wafer manufacturing process and to implement a educational model which operates with a presentation tool showing device design. It is important that Korean semiconductor industries secure high competitive power on efficient manufacturing management and to develop technology continuously. Models representing the FAB processes and the functions of each process are developed for Seoul National University Semiconductor Research Center. However, it is expected that the models are effective as visually educational tools in Korean semiconductor industries. In addition, it is anticipated that these models are useful for semiconductor process courses in academia. Scalability and flexibility allow semiconductor manufacturers to customize the models and perform simulation education. Subsequently, manufacturers save budget.