• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• 마이크로전자및패키징학회지
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• 제12권4호통권37호
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• pp.275-280
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• 2005

나노 임프린트 (NIL)와 포토 리소그라피를 접목시킨 combined nanoimprint and photolithography (CNP) 기술을 이용하여 나노 미세 패턴을 형성하였다. 일반적인 UV-NIL 스탬프의 양각 패턴 위에 Cr 금속막을 입힌 hybrid mask mold (HMM)을 E-beam writing과 plasma etching으로 제작하였다. HMM 전면에는 친수성 물질인 $SiO_2$를 코팅하여 점착방지막 역할의 self-assembled monolayer(SAM) 형성을 용이하게 함으로써 HMM과 transfer layer의 분리를 용이하게 하여 패턴 손상을 억제하였다. 또한, transfer layer에는 일반적인 monomer resin 대신에 건식 에칭에 대한 저항력이 높은 negative PR을 사용하였다. Photo-mask 역할을 하는 HMM의 Cr 금속막이 UV를 차단하여 잔류하게 되는 PR의 비경화층(unexpected residual layer)은 간단한 현상 공정으로 제거하여 PR 잔류층이 없는 나노 미세 패턴을 transfer layer에 형성하였다.

• 한국진공학회지
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• 제20권1호
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• pp.63-69
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• 2011

본 연구에서는 기존 실리콘 반도체 기술 기반의 포토 및 이빔 리소그래피 공정을 통하여 유기 반도체 소자를 패터닝하였다. P3HT나 PEDOT 등의 유기 반도체는 용매에 녹기 때문에 MIMIC (micro-molding in capillaries)이나 inkjet printing 기술을 이용하여 마이크로미터 크기의 소자 제작이 가능하였으나, 펜타신은 용매에 녹지 않기 때문에 매우 복잡한 방법으로 마이크로미터 크기의 소자를 제작하여왔다. 그러나, 본 연구에서는 원자층 증착 방법으로 증착한 산화 알루미늄막을 펜타신의 보호층으로 이용하여 기존의 포토 및 이빔 리소그래피 방법으로 마이크로미터크기의 펜타신 소자를 제작하였으며 그 전기 특성을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권4호
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• pp.259-267
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• 2002

We present a novel 3D fabrication method with single X-ray process utilizing an X-ray mask in which a micro-actuator is integrated. An X-ray absorber is electroplated on the shuttle mass driven by the integrated micro-actuator during deep X-ray exposures. 3D microstructures are revealed by development kinetics and modulated in-depth dose distribution in resist, usually PMMA. Fabrication of X-ray masks with integrated electrothermal xy-stage and electrostatic actuator is presented along with discussions on PMMA development characteristics. Both devices use $20-\mu\textrm{m}$-thick overhanging single crystal Si as a structural material and fabricated using deep reactive ion etching of silicon-on-insulator wafer, phosphorous diffusion, gold electroplating, and bulk micromachining process. In electrostatic devices, $10-\mu\textrm{m}-thick$ gold absorber on $1mm{\times}1mm$ Si shuttle mass is supported by $10-\mu\textrm{m}-wide$, 1-mm-long suspension beams and oscillated by comb electrodes during X-ray exposures. In electrothermal devices, gold absorber on 1.42 mm diameter shuttle mass is oscillated in x and y directions sequentially by thermal expansion caused by joule heating of the corresponding bent beam actuators. The fundamental frequency and amplitude of the electrostatic devices are around 3.6 kHz and $20\mu\textrm{m}$, respectively, for a dc bias of 100 V and an ac bias of 20 VP-P (peak-peak). Displacements in x and y directions of the electrothermal devices are both around $20{\;}\mu\textrm{m}$at 742 mW input power. S-shaped and conical shaped PMMA microstructures are demonstrated through X-ray experiments with the fabricated devices.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.502-502
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• 2007

Current thin film process using memory device fabrication process use expensive processes such as manufacturing of photo mask, coating of photo resist, exposure, development, and etching. However, direct printing technology has the merits about simple and cost effective processes because inks are directly injective without mask. And also, this technology has the advantage about fabrication of fine pattern line on various substrates such as PCB, FCPB, glass, polymer and so on. In this work, we have fabricated the fine and thick metal pattern line for the electronic circuit board using metal ink contains Ag nano-particles. Metal lines are fabricated by two types of printing methods. One is a conventional printing method which is able to quick fabrication of fine pattern line, but has various difficulties about thick and high resolution DPI(Dot per Inch) pattern lines because of bulge and piling up phenomenon. Another(Second) methods is sequential printing method which has a various merits of fabrication for fine, thick and high resolution pattern lines without bulge. In this work, conductivities of metal pattern line are investigated with respect to printing methods and pattern thickness. As a result, conductivity of thick pattern is about several un.

• 대한기계학회논문집A
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• 제26권10호
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• pp.2187-2193
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• 2002

We present a novel method for 3D microfabrication with LIGA process that utilizes a deep X-ray mask in which a micro-actuator is integrated. The integrated micro-actuator oscillates the X-ray absorber, which is formed on the shuttle mass of the micro-actuator, during X-ray exposures to modify the absorbed dose profile in X-ray resist, typically PMMA. 3D PMMA microstructures according to the modulated dose contour are revealed after GG development. An X-ray mask with integrated comb drive actuator is fabricated using deep reactive ion etching, absorber electroplating, and bulk micromachining with silicon-on-insulator (SOI) wafer. 1mm $\times$ 1 mm, 20 $\mu$m thick silicon shuttle mass as a mask blank is supported by four 1 mm long suspension beams and is driven by the comb electrodes. A 10 $\mu$m thick, 50 $\mu$m line and spaced gold absorber pattern is electroplated on the shuttle mass before the release step. The fundamental frequency and amplitude are around 3.6 kHz and 20 $\mu$m, respectively, for a do bias of 100 V and an ac bias of 20 $V_{p-p}$ (peak-peak). Fabricated PMMA microstructure shows 15.4 $\mu$m deep, S-shaped cross section in the case of 1.6 kJ $cm^{-3}$ surface dose and GG development at 35$^{\circ}C$ for 40 minutes.

• 공업화학
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• 제22권2호
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• pp.230-234
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• 2011

반도체산업은 고집적화된 회로를 요구하면서 미세 패턴을 형성하기 위해 계속해서 발전해가고 있다. 이에 반도체 산업에서 미세 패턴을 형성하기 위하여 하드마스크를 도입하여 사용되고 있다. 일반적으로 하드마스크는 화학증기증착법(CVD) 공정을 이용하여 다층구조로 제작된다. 이에 본 연구에서는 스핀공정이 가능하고 단층의 하드마스크용 조성물을 제조하기 위하여 유-무기 하이브리드 중합체를 이용하여 그 특성에 대하여 연구하였다. Silanol로 처리된 siloxane 화합물과 acetonide 그룹을 가지는 propionic acid를 에스터화 반응을 통하여 얻은 유-무기 하이브리드 중합체에 가교제 및 첨가제들의 첨가로 광학적, 열적, 그리고 표면 특성이 조절된 하드마스크 막을 제조하였다. 또한 하드마스크 막과 감광층의 식각비를 비교하여 유-무기 소재의 하이브리드 중합체에 대해 미세패턴을 형성시킬 수 있는 하드마스크 막으로써의 유용성을 확인하였다.