• JSTS:Journal of Semiconductor Technology and Science
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• 제12권4호
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• pp.418-425
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• 2012

In this paper, efficient implementation of error correction code (ECC) processing circuits based on single error correction and double error detection (SEC-DED) code with check bit pre-computation is proposed for memories. During the write operation of memory, check bit pre-computation eliminates the overall bits computation required to detect a double error, thereby reducing the complexity of the ECC processing circuits. In order to implement the ECC processing circuits using the check bit pre-computation more efficiently, the proper SEC-DED codes are proposed. The H-matrix of the proposed SEC-DED code is the same as that of the odd-weight-column code during the write operation and is designed by replacing 0's with 1's at the last row of the H-matrix of the odd-weight-column code during the read operation. When compared with a conventional implementation utilizing the odd-weight- column code, the implementation based on the proposed SEC-DED code with check bit pre-computation achieves reductions in the number of gates, latency, and power consumption of the ECC processing circuits by up to 9.3%, 18.4%, and 14.1% for 64 data bits in a word.

• 한국통신학회논문지
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• 제19권5호
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• pp.912-919
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• 1994

본 논문에서는 확대 Hamming 부호를 이용한 새로운 오류제어선로부호를 제안하고 그 성능을 분석한다. 제안된 부호는 최소 Hamming 거리가 4이므로 기본적으로 한개의 오류를 정정할 수 있고 두개의 오류를 검출한 수 있다. 또한 선로부호에 사용되는 여분의 비트를 이용하여 오류검출 능력을 증가시킬 수 있다. 결과적으로 제안된 부호는 Hamming (7.4) 부호를 이용한 기존의 오류정정선로부호에 비해 부호율은 다소 떨어지나 저주파대역에서의 스펙트럼 특성이 더 우수하며 더 적은 복호비트오율을 가진다.

• 전기학회논문지
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• 제59권2호
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• pp.417-422
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• 2010

When memory devices are exposed to space environments, they suffer various effects such as SEU(Single Event Upset). Memory systems for space applications are generally equipped with error detection and correction(EDAC) logics against SEUs. In this paper, several error detection and correction codes - RS(10,8) code, (7,4) Hamming code and (16,8) code - are analyzed and compared with each other. Each code is implemented using VHDL and its performances(encoding/decoding speed, required memory size) are compared. Also the failure probability equation of each EDAC code is derived, and the probability value is analyzed for various occurrence rates of SEUs which the STSAT-3 possibly suffers. Finally, the EDAC algorithm for STSAT-3 is determined based on the comparison results.

• Journal of Advanced Marine Engineering and Technology
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• 제25권2호
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• pp.375-382
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• 2001

In this study, an adapted Turbo Coding Algorithm for reducing communication error of a fire detection system for marine vessels, especially image transmission via power lone. Because it is necessary that this system communicate larger and faster than previous method, this study carried out enhancement a decoding speed by adaptation CRC with Turbo Code Algorithm, improvement of metric method, and reduction of decoding delay by using of Center-to-Top method. And the results are as follows: (1) Confirmed that a Turbo Code is so useful methods for reducing communication error in lots of noise environments. (2)Proposed technology in this study speed increasing method of Turbo Coding Algorithm proves 2 times faster than normal Turbo Code and communication error reducing as well in the board made by VHDL software & chips ALTERA company.

• 한국전자통신학회논문지
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• 제13권4호
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• pp.721-728
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• 2018

본 논문은 다양한 구조의 선형 블록 오류정정코드를 소개하고, 이를 회로로 구현하여 비교 분석한 결과를 보여주고 있다. 메모리 시스템에서는 잡음 전력으로 인한 비트 오류를 방지하기 위해 ECC(: Error Correction Code)가 사용되어 왔다. ECC의 종류에는 SEC-DED(: Single Error Correction Double Error Detection)와 SEC-DED-DAEC(: Double Adjacent Error Correction)가 있다. SEC-DED인 Hsiao 코드와 SEC-DED-DAEC인 Dutta, Pedro 코드를 각각 Verilog HDL을 이용해 설계 후 $0.35{\mu}m$ CMOS 공정을 사용해 회로로 합성하였다. 시뮬레이션에 의하면 SEC-DED회로는 인접한 두 개의 비트 오류를 정정하지 못하지만 적은 회로 사용면적과 빠른 지연 시간의 장점이 있으며, SEC-DED-DAEC 회로의 경우 Pedro 코드와 Dutta 코드 간에는 면적, 지연 시간의 차이가 없으므로 오류 정정률이 개선된 Pedro 코드를 사용하는 것이 더 효율적임을 알 수 있다.

• Journal of Communications and Networks
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• 제5권3호
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• pp.187-196
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• 2003

We consider the use of error control coding in direct sequence-code-division multiple access (OS-COMA) systems that employ multiuser detection (MUO) and space diversity. The relative performance gain between Reed-Solomon (RS) code and convolutional code (CC) is well known in [1] for the single user, additive white Gaussian noise (AWGN) channel. In this case, RS codes outperform CC's at high signal-to-noise ratios. We find that this is not the case for the multiuser interference channel mentioned above. For useful error rates, we find that soft-decision CC's to be uniformly better than RS codes when used with DS-COMA modulation in multiuser space-time channels. In our development, we use the Gaussian approximation on the interference to determine performance error bounds for systems with low number of users. Then, we check their accuracy in error rate estimation via system's simulation. These performance bounds will in turn allow us to consider a large number of users where we can estimate the gain in user-capacity due to channel coding. Lastly, the use of turbo codes is considered where it is shown that they offer a coding gain of 2.5 dB relative to soft-decision CC.

• 한국정보통신학회논문지
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• 제26권11호
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• pp.1747-1750
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• 2022

As shrinking the semiconductor process into the deep sub-micron to achieve high-density, low power and high performance integrated circuits, MBU (multiple bit upset) by soft errors is one of the major challenge of on-chip memory systems. To address the MBU, single error correction, double error detection and double adjacent error correction (SEC-DED-DAEC) codes have been recently proposed. But these codes do not resolve mis-correction. We propose the SEC-DED-DAEC-TAED(triple adjacent error detection) code without mis-corrections. The generated H-matrix by the proposed heuristic algorithm to accomplish the proposed code is implemented as hardware and verified. The results show that there is no mis-correction in the proposed codes and the 2-stage pipelined decoder can be employed on-chip memory system.

• Current Optics and Photonics
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• 제3권6호
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• pp.531-540
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• 2019

Spectral Amplitude Coding Optical Code Division Multiple Access (SAC OCDMA) is an advanced technique in asynchronous environments. This paper proposes design and implementation of a novel quantum logic gate (QLG) code, with code construction algorithm generated without following any code mapping procedures for SAC system. The proposed code has a unitary matrices property with maximum overlap of one chip for various clients and no overlaps in spectra for the rest of the subscribers. Results indicate that a single algorithm produces the same length increment for codes with weight greater than two and follows the same signal to noise ratio (SNR) and bit error rate (BER) calculations for a higher number of users. This paper further examines the performance of a QLG code based SAC-OCDMA system with NAND and direct detection techniques. BER analysis was carried out for the proposed code and results were compared with existing MDW, RD and GMP codes. We demonstrate that the QLG code based system performs better in terms of cardinality, which is followed by improved BER. Numerical analysis reveals that for error free transmission (10^-9), the suggested code supports approximately 170 users with code weight 4. Our results also conclude that the proposed code provides improvement in the code construction, cross-correlation and minimization of noises.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제6권5호
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• pp.1316-1332
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• 2012

Formation flying is an important technology that enables high cost-effective organization of outer space aircrafts. The ad-hoc wireless network based on direct-sequence ultra-wideband (DS-UWB) techniques is seen as an effective means of establishing wireless communication links between aircrafts. In this paper, based on the theory of matched filter and error bits correction, a hybrid detection algorithm is proposed for realizing multiuser detection (MUD) when the DS-UWB technique is used in the ad-hoc wireless network. The matched filter is used to generate a candidate code set which may contain several error bits. The error bits are then recognized and corrected by an novel error-bit corrector, which consists of two steps: code mapping and clustering. In the former step, based on the modified optimum MUD decision function, a novel mapping function is presented that maps the output candidate codes into a feature space for differentiating the right and wrong codes. In the latter step, the codes are clustered into the right and wrong sets by using the K-means clustering approach. Additionally, in order to prevent some right codes being wrongly classified, a sign judgment method is proposed that reduces the bit error rate (BER) of the system. Compared with the traditional detection approaches, e.g., matched filter, minimum mean square error (MMSE) and decorrelation receiver (DEC), the proposed algorithm can considerably improve the BER performance of the system because of its high probability of recognizing wrong codes. Simulation results show that the proposed algorithm can almost achieve the BER performance of the optimum MUD (OMD). Furthermore, compared with OMD, the proposed algorithm has lower computational complexity, and its BER performance is less sensitive to the number of users.

• 한국군사과학기술학회지
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• 제8권3호
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• pp.42-50
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• 2005

In this paper, a novel method is proposed how the ECC(Error Correction Code) in server system can be investigated and the robustness of each system against noisy environment and element failure in memory module has been verified. Chipset manufacturers have hided the algorithm of their Hamming code and the user has difficulty in verification of the robustness of each system. The proposed method is very simple, but the outputs of the experiment explain the core ability of error correction in server system and helps the detection of the failure element. On the basis of these results, we could expect the robustness of digitalized weapon system and the efficient design of our own error correction code.