• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.75-82
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• 2004

The channel transmission ratio is speeded up by the combination of the Huffman algorithm, the model scheme of the lossy transform having minimum average code lengths for the image information and good instantaneous decoding capability, with the Lempel-Ziv algorithm showing the fast processing performance during the compression process. In order to increase the processing speed during the compression process, ICMEP algorithm is proposed and the entropy encoder of HDTV is designed and inspected. The ICMEP entropy encoder have been designed by choosing the top-down method and consisted of the source codes and the test benches by the behavior expression with VHDL. As a simulation results, implemented ICMEP entropy encoder confirmed that whole system efficiency by memory saturation prevention and compressibility increase improves.

• Journal of information and communication convergence engineering
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• v.6 no.1
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• pp.29-33
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• 2008

This paper presents the proposal and hardware design of JPEG baseline encoder. The JPEG encoder system consists of line buffer, 2-D DCT, quantization, entropy encoding, and packer. A fully pipelined scheme for JPEG encoder is adopted to speed-up an image compression. The proposed architecture was described in VHDL and synthesized in Xilinx ISE 7.1i and simulated by modelsim 6.1i. The results showed that the performance of the designed JPEG baseline encoder is higher than that demanded by real-time applications for $1024{\times}768$ image size. The designed JPEG encoder IP can be easily integrated into various application systems, such as scanner, PC camera, color FAX, and network camera, etc.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.2485-2489
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• 2005

This paper introduces a new preprocessing scheme to replace original data of gray scale images with particular ordered data so that performance of lossless compression can be improved more efficiently. As a kind of preprocessing technique to maximize performance of entropy encoder, the proposed method converts the input image data into more compressible form. Before encoding a stream of the input image, the proposed preprocessor counts co-occurrence frequencies for neighboring pixel pairs. Then, it replaces each pair of adjacent gray values with particular ordered numbers based on the investigated co-occurrence frequencies. When compressing ordered image using entropy encoder, we can expect to raise compression rate more highly because of enhanced statistical feature of the input image. In this paper, we show that lossless compression rate increased by up to 37.85% when comparing results from compressing preprocessed and non-preprocessed image data using entropy encoder such as Huffman, Arithmetic encoder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.5A
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• pp.545-553
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• 2004

Expansion of network environment and multimedia demand universality of application service as HDTV, etc. During these processes, it is essential to process multimedia in real time in the wireless communication system based on mobile phone network and in the wire communication system due to fiber cable and xDSL. So, in this Paper the optimal memory allocation algorithm combines the merit of huffman encoding which is superior in simultaneous decoding ability and lempel-ziv that is distinguished in execution of compress is proposed to improve the channel transmission rate and processing speed in the compressing procedure and is verified in the entropy encoder of HDTV. Because the entropy encoder system using proposed optimal memory allocation algorithm has memory saturation prevention we confirms that the compressing ratio for moving pictures is superior than Huffman encoding and LZW.

• ETRI Journal
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• v.46 no.3
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• pp.513-525
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• 2024

Deep neural networks trained on labeled medical data face major challenges owing to the economic costs of data acquisition through expensive medical imaging devices, expert labor for data annotation, and large datasets to achieve optimal model performance. The heterogeneity of diseases, such as Alzheimer's disease, further complicates deep learning because the test cases may substantially differ from the training data, possibly increasing the rate of false positives. We propose a reconstruction-based self-supervised anomaly detection model to overcome these challenges. It has a dual-subnetwork encoder that enhances feature encoding augmented by skip connections to the decoder for improving the gradient flow. The novel encoder captures local and global features to improve image reconstruction. In addition, we introduce an entropy-based image conversion method. Extensive evaluations show that the proposed model outperforms benchmark models in anomaly detection and classification using an encoder. The supervised and unsupervised models show improved performances when trained with data preprocessed using the proposed image conversion method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.774-780
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• 2017

This paper proposes an efficient binary arithmetic encoder hardware architecture for CABAC encoding, which is an entropy coding method of HEVC. CABAC is an entropy coding method that is used in HEVC standard. Entropy coding removes statistical redundancy and supports a high compression ratio of images. However, the binary arithmetic encoder causes a delay in real time processing and parallel processing is difficult because of the high dependency between data. The operation of the proposed CABAC BAE hardware structure is to separate the renormalization and process the conventional iterative algorithm in parallel. The new scheme was designed as a four-stage pipeline structure that can reduce critical path optimally. The proposed CABAC BAE hardware architecture was designed with Verilog HDL and implemented in 65nm technology. Its gate count is 8.07K and maximum operating speed of 769MHz. It processes the four bin per clock cycle. Maximum processing speed increased by 26% from existing hardware architectures.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.59-65
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• 1999

In this paper, we design a entorpy encoder of HDTV/DTV encoder blocks on the basis of MPEG-II. The designed entropy encoder outputs its bit stream at 9Mbps bit rate inserting zero-stepping block to protect the depletion of buffer in case that the generated bit stream is stored in buffer and uses not only PROM bit combinational circuit to solve the problem of critical path, and packer block, one of submerge, is designed to packing into 24 bit unit using barrel shifter, and it is constructed to blocks of header information encoder, input information delay, submerge, and buffer control. Designed circuits is verified by VHDL function simulation, as a result of performing P&R with Gate compiler that apply $0.8{\mu}m$ Gate Array specification, pin and gate number of total circuits has been tested to each 235 and about 120,000.

• Journal of Electrical Engineering and information Science
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• v.1 no.1
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• pp.91-97
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• 1996

This paper proves by straightforward computation an interesting property of a recursive indexing: it preserves the entropy of a geometrically-distributes stationary memoryless source. This result is a pleasant surprise because the recursive indexing though one-to-one, is a symbol-to-string mapping and the entropy is measured in terms of the source symbols. This preservation of the entropy implies that the minimum average number of bits needed to represent a geometric memoryless source by the recursive indexing followed by a good binary encoder of a finite imput alphabet remains the same as that by a good encoder of an infinite input alphabet. Therefore, the recursive indexing theoretically keeps coding optimality intact. For this reason recursive indexing can provide an interface for a binary code with a finite code book that performs reasonably well for a source with an infinite alphabet.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5C
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• pp.371-381
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• 2005

In this paper, we propose an advanced hardware architecture for the CAVLC entropy encoder/decoder engine for real time video compression. The CAVLC (Context-based Adaptive Variable Length Coding) is a lossless compression method in H.264/AVC and it has high compression efficiency but has computational complexity. The reference memory size is optimized using partitioned storing method and memory reuse method which are based on partiality of memory referencing. We choose the hardware architecture which has the most suitable one in several encoder/decoder architectures for the mobile devices and improve its performance using parallel processing. The proposed architecture has been verified by ARM-interfaced emulation board using Altera Excalibur and also synthesized on Samsung 0.18 um CMOS technology. The synthesis result shows that the encoder can process about 300 CIF frames/s at 150MHz and the decoder can process about 250 CIF frames/s at 140Mhz. The hardware architectures are being used as core modules when implementing a complete H.264/AVC video encoder/decoder chip for real-time multimedia application.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.1383-1386
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• 1997

Discrete cosine transform(DCT) is the most popular block transform coding in lossy mode. DCT is close to statistically optimal transform-the Karhunen Loeve transform. In this paper, a module for DCT encoder is made with TMS320C80 based on JPEG and MPEG, which are intermational standards for image compression. the DCT encoder consists of three parts-a transformer, a vector quantizer and an entropy encoder.