• 한국철도학회:학술대회논문집
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• 한국철도학회 2008년도 춘계학술대회 논문집
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• pp.535-544
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• 2008

Unlike MS(Magnetic Stripe), SMART CARD is equipped with COS(Chip Operating System) consisting of the Microprocessor and Memory where information can be stored and processed, and there are two types of cards according to the contact mode; the contact type that passes through a gold plated area and the contactless one that goes through the radio-frequency using an antenna embedded in the plastic card. the contactless IC card used for the transportation card was first introduced into local area buses in Seoul, and expanded throughout the country so that it has removed the inconvenience such as possession of cash, fare payment and collection. Focusing on the Seoul metropolitan area in 2004, prepaid and pay later cards were adopted and have been used interchangeably between a bus and subway. The card terminal compatible between a bus and subway is Proximity Integrated Circuit Card(PICC) as international standards(1443 Type A,B), communicates in the 13.56MHz dynamic frequency modulation-demodulation system, and adopts the Multi Secure Application Module(SAM). In the second half of 2009, the system avaliable nationwide will be built when the payment SAM standard is implemented.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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• pp.421-426
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• 2004

Analyzing adaptive possibilities of agents in multi-agents system, we have discovered new aspects of ambient intelligence in distributed modular systems using intelligent building blocks (I-BLOCKS) [1]. This paper describes early scientific researches related to technical design, applicable experiments and evaluation of adaptive processing and information interaction among I-BLOCKS allowing users to easily develop ambient intelligence applications. The processing technology presented in this paper is embedded inside each DUPLO1 brick by microprocessor as well as selected sensors and actuators in addition. Behaviors of an I-BLOCKS modular structure are defined by the internal processing functionality of each I-Blocks in such structure and communication capacities between I-BLOCKS. Users of the I-BLOCKS system can do 'programming by building' and thereby create specific functionalities of a modular structure of intelligent artefacts without the need to learn and use traditional programming language. From investigating different effects of modem artificial intelligence, I-BLOCKS we have developed might possibly contain potential possibilities for developing applications in ambient intelligence (AmI) environments. To illustrate these possibilities, the paper presents a range of different experimental scenarios in which I-BLOCKS have been used to set-up reconfigurable modular systems. The paper also reports briefly about earlier experiments of I-BLOCKS in different research fields, allowing users to construct AmI applications by a just defined concept of modular artefacts [3].

• 대한전기학회논문지
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• 제34권6호
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• pp.230-237
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• 1985

Shortest path calculations for a large-scale network have to be performed using a decomposition techniqre, since the calculations require large memory size which increases by the square of the number of vertices in the network. Also, the calculation time increases by the cube of the number of vertices in the network. In the decomposition technique,the network is broken into a number of smaller size subnetworks for each of which shortest paths are computed. A union of the solutions provides the solution of the original network. In all of the decomposition algirithms developed up to now, boundary vertices which divide all the subnetworks have to be included in computing shortest paths for each subnetwork. In this paper, an improved algorithm is developed to reduce the number of boundary vertices to be engaged. In the algorithm, only those boundary vertices that are directly connected to the subnetwork are engaged. The algorithm is suitable for an application to real time computation using a parallel processor system which consists of a number of micro-computers or prcessors. The algorithm has been applied to a 39- vertex network and a 232-vertex network. The results show that it is efficient and has better performance than any other algorithms. A parallel processor system has been built employing an MZ-80 micro-computer and two Z-80 microprocessor kits. The former is used as a master processor and the latter as slave processors. The algorithm is embedded into the system and proven effective for real-time shortest path computations.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 A
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• pp.447-449
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• 2005

Power supply system & environment have been changed according to the universal global electrification, the pursuit of improving productivity and the convenience of life. The various kinds of modem electric facilities and almost of all kinds of digital devices embedded microprocessor are very sensitive to the supplied power quality variations. So, they are stopped and result in large economic damage when even the deterioration of power quality with short duration is occurred, which was not so fatal to the conventional industrial facilities and devices. Conversely, those facilities and digital devices generate many kinds of power quality problems such as harmonic.;, flicker, voltage drop, etc. This paper presents the status of power quality and outlines the development of a new power quality monitoring system based on the experience of a series of authors' researches and field measurements for industrial customers in Korea. It also proposes the functions of the monitoring device and the efficient analysis method based on the Korean electrical act and international standards on power quality. Finally, the authors suggest some countermeasures for advancing the power quality to cope with the competitive electric power market and customers' needs after domestic restructuring of electric power industry.

• 정보처리학회논문지A
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• 제18A권6호
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• pp.265-270
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• 2011

다양한 영역에서32비트 명령어 기반 마이크로프로세서의 사용이 일반화되고 있지만, 임베디드 시스템 환경에서는 여전히 16비트 명령어 기반 프로세서가 널리 사용되고 있다. 인텔 8086, 80286 및 모토로라 68000, 그리고 에이디칩스의 AE32000과 같은 프로세서들이 그 대표적인 예이다. 그러나, 16비트 명령어들은 32비트 명령어보다 그 크기로 인해 상대적으로 낮은 표현력을 가지고 있어 동일한 기능을 구현하는데 32비트 명령어 기반 프로세서에 비해 많은 명령어를 수행해야 한다는 문제점을 가지고 있다. 실행 명령어 수는 프로세서의 실행 성능과 밀접한 관련을 가지므로 16비트 명령어셋의 표현력을 향상시켜 성능 저하 문제를 해결할 필요성이 있다. 본 논문에서는 기존의 그래프 컬러링 기반 레지스터 할당(Graph-coloring based Register Allocation) 알고리즘을 보완한 페어 레지스터 할당(Pair Register Allocation) 알고리즘을 제안하고, 이를 통한 성능 분석 결과 및 추후 연구 방향을 제시하고자 한다.

• 한국정보통신학회논문지
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• 제13권2호
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• pp.293-298
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• 2009

본 연구에서는 193비트 타원곡선 암호화프로세서를 보조프로세서 형태로 제작하여 FPGA에 구현하였다. 프로그램 레벨에서 최적화된 알고리즘과 수식을 제안하여 증명하였고, 검증을 위해 Verilog와 같은 하드웨어 기술언어를 통하여 다시 한번 분석 하여 하드웨어 구현에 적합하도록 수정하여 최적화 하였다. 그 이유는 프로그래밍 언어의 순차적으로 컴파일되고 실행되는 특성이 하드웨어를 직접 구현하는 데에 본질적으로 틀리기 때문이다. 알고리즘적인 접근과 더불어 하드웨어적으로 2중적으로 검증된 하드웨어 보조프로세서를 Altera 임베디드 시스템을 활용하여, ARM9이 내장되어 있는 Altera CycloneII FPGA 보드에 매핑하여 실제 칩 프로토타입 IP로 구현하였다. 구현된 유한체 연산 알고리즘과 하드웨어 IP들은 실제적인 암호 시스템에 응용되기 위하여, 193 비트 이상의 타원 곡선 암호 연산 IP를 구성하는 라이브러리 모듈로 사용될 수 있다.

• Journal of Advanced Marine Engineering and Technology
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• 제35권2호
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• pp.288-294
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• 2011

본 논문에서는 FPGA기반의 SoC보드(Xilinx Virtex-4 ML401 EVM)를 이용한 전력인버터제어시스템을 설계하였다. 선박에 전력시스템을 적용하기 위해서 선박의 최신 통신 프로토콜인 NMEA 2000 표준 프로토콜을 적용하였으며 전력 시스템의 성능을 평가하기 위한 PC기반의 모니터링 프로그램을 제작하였다. 전력 제어시스템은 FPGA기반의 임베디드 SoC보드상에서 이중프로세서(Dualprocessor)형태로 설계하였으며 이중프로세서를 적용함으로써 실시간 제어 감시가 가능하다. 이중프로세서 중 하나는 전력 제어를 위한 PWM신호생성 및 전력 회로내의 주요 전력 파라미터를 센싱 하는 제어용 프로세서로 동작하며(Control processor) 다른 프로세서는 제어프로세서의 각종 전력 센서 파라미터와 제어 파라미터들을 이중포트 램(Dual Port RAM)을 이용하여 정보를 공유하고 외부 NMEA 2000프로토콜 기반의 모니터링 장치와 네트워크 기반의 통신을 수행하는 통신용 프로세서(Communication processor)로 구성된다. 본 논문에서 제작한 전력 제어시스템은 선박내의 분산발전,송배전 및 전압 레귤레이션 시스템에 적용 될 수 있다.

• Journal of Biosystems Engineering
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• 제28권1호
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• pp.53-58
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• 2003

This study was carried out to design, construct, and test a greenhouse monitoring system fur the environment and status of control devices in a greenhouse from a remote site using internet. The measuring items selected out of many environmental factors were temperature, humidity, solar radiation, CO$_2$, SOx, NOx concentration, EC, pH of nutrient solution, the state of control devices, and the image of greenhouse. The developed greenhouse monitoring system was composed of the network system and the measuring module. The network system consists of the three kinds of monitors named the Croup Monitor. the Client Monitor and the Server Monitor. The results of the study are summarized as follows. 1. The measuring module named the House Monitor. which is used to watch the state of the control device and the environment of the greenhouse, was developed to a embedded monitoring module using one chip microprocessor 2. For all measuring items. the House Monitor showed a satisfactory accuracy within the range of ${\pm}$0.3%FS. The House Monitors were connected to the Croup Monitor by communication method of RS-485 type and could operate under power and communication fault condition within 10 hours. The Croup Monitor was developed to receive and display measurement data received from the House Monitors and to control the greenhouse environmental devices. 3. The images of the plants inside greenhouse were captured by PC camera and sent to the Group Monitor. The greenhouse manager was able to monitor the growth state of plants inside greenhouse without visiting individual greenhouses. 4. Remote monitoring the greenhouse environment and status of control devices was implemented in a client/server environment. The client monitor of the greenhouse manager at a remote site or other greenhouse manager was able to monitor the greenhouse environment and the state of control devices from the Server Monitor using internet.

• 한국통신학회논문지
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• 제26권11C호
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• pp.148-156
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• 2001

본 논문에서는 RISC 마이크로프로세서에 DSP프로세서를 추가하여 멀티미디어 기능이 강화된 응용에 알맞은 마이크로프로세서(YS-RDSP)를 제안한다. YS-RDSP는 최대 4개의 명령어를 동시에 병렬로 처리할 수 있다. 프로그램의 크기를 줄이기 위해 YS-RDSP는 16비트와 32비트의 두 가지 명령어 길이를 지원한다. YS-RDSP는 칩 하나로 RISC마이크로프로세서의 programmability 및 제어능력에 DSP의 처리능력을 제공하기 위하여 8-KByte ROM과 8-KByte RAM을 내장하고 있다. 칩 내에 있는 주변장치중 하나인 시스템 컨트롤러는 저전압 동작을 위한 3가지의 전압강하모드를 지원하며 SLEEP명령어는 CPU코어와 주변장치의 동작상태를 변환시킨다. YS-RDSP프로세서는 Verilog-HDL를 이용하여 하향식설계방식으로 구현되었고 C-언어로 작성된 사이클 단위 시뮬레이터를 이용하여 개선되고 검증되었다. 검증된 모델은 0.6um, 3.3V CMOS 표준 셀 라이브러리로 합성되었으며 자동화 P&R에 의해 10.7mm8.4mm코어 면적을 갖도록 레이아웃 되었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 D
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• pp.2344-2346
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• 2002

A vacuum control system has been developed for using Ethernet Multi Serial Device Severs (EMSDS) for the Pohang Accelerator Laboratory (PAL) storage ring. There are 124 vacuum ion pumps at the storage ring. It was a very important problem to solve the problem how to control such a big number of vacuum pumps distributed around the ring. After discussions, we decided to develop a serial to ethernet interrace device sever that will be mounted in the control system rack. It has a 32-bits microprocessor embedded Linux, 12 ports RS485 (or RS232) slave interface. one channel 10/100BaseTx ethernet host port, one channel UART host port, and 16 Mbytes large memory buffer. These vacuum pumps are connected to Ion-Pump serial controllers, which chop the AC current so as to control the current in the pumps. The EMSDS connect either 100BaseTx or 10BaseT ethernet networks to asynchronous serial ports for communication with serial device. It can simultaneously control up to 12 ion-pump serial controllers. 12 EMSDS are connected to a personal computer (PC) through the network. The PC can automatically control the EMSDS by sending a set of commands through the TCP/IP network. Upon receiving a command from a PC running under Windows2000 through the network, the EMSDS communicate through the stave serial interrace ports to ion-pump controller. We added some software components on the top of EPICS (Experimental Physics and Industrial Control System) toolkit.