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http://dx.doi.org/10.6109/JKIICE.2009.13.2.293

Design of a High-Performance Information Security System-On-a-Chip using Software/Hardware Optimized Elliptic Curve Finite Field Computational Algorithms  

Moon, San-Gook (목원대학교)
Abstract
In this contribution, a 193-bit elliptic curve cryptography coprocessor was implemented on an FPGA board. Optimized algorithms and numerical expressions which had been verified through C program simulation, should be analyzed again with HDL (hardware description language) such as Verilog, so that the verified ones could be modified to be applied directly to hardware implementation. The reason is that the characteristics of C programming language design is intrinsically different from the hardware design structure. The hardware IP which was double-checked in view of hardware structure together with algoritunic verification, was implemented on the Altera CycloneII FPGA device equipped with ARM9 microprocessor core, to a real chip prototype, using Altera embedded system development tool kit. The implemented finite field calculation IPs can be used as library modules as Elliptic Curve Cryptography finite field operations which has more than 193 bit key length.
Keywords
GF; FPGA; Altera;
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1 Sangook Moon, Jaemin Park and Yongsurk Lee, 'Fast VLSI Arithmetic Algorithms for High-Security Elliptic Curve Cryptographic Applications', IEEE Transactions on Consumer Electronics, Vol. 47, No. 3, pp. 700~708, August 2001   DOI   ScienceOn
2 http://www.modelsim.com, ModelSim SE Tutorial, Jul. 2004
3 최용제, 김호원, 김무섭, 박영수, 'IC 카드를 위한 polynomial 기반의 타원 곡선 암호시스템 연산기 설계,' 2001년도 대한전자공학회 하계종합학술대회 논문지 제 24권 제 1호, pp. 305-308, 2001
4 문상국, '타원 곡선 암호용 프로세서를 위한 고속 VLSI 알고리즘의 연구와 구현,' 연세대학교 대학원 박사학위논문집, 2002
5 http://www.arm.com
6 G. Orlando, C. Paar, 'A Super-Serial Galois Fields Multiplier for FPGAs and its Application to Public-Key Algorithms,' Proceedings of 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 232-239, 1999
7 Min-Sup Kang, et. al., 'Hardware Implementation of Fast Division Algorithm for GF(2m)', The 8th International Conference of Advanced Communi- cation Technology (ICACT), Vol. 1, Issue 20-22, Feb. 2006
8 http://www.altera.com
9 Samir Palnitkar, 장훈 역, Verilog HDL 디지털 설계와 합성의 길잡이, 홍릉과학출판사, 2005
10 B. Schneier, Applied Cryptography, second edition, John Wiley & Sons, Inc., 1996