• Journal of KIISE:Computer Systems and Theory
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• v.35 no.6
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• pp.284-292
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• 2008

The density of Memory has been increased by great challenge for memory technology; therefore, elements of memory become more smaller than before and the sensitivity to faults increases. As a result of these changes, memory testing becomes more complex. In addition, as the number of storage elements per chip increases, the test cost becomes more remarkable as the cost per transistor drops. Recent development in system-on-chip(SoC) technology makes it possible to incorporate large embedded memories into a chip. However, it also complicates the test process, since usually the embedded memories cannot be controlled from the external environment. We present a ARM processor-programmable built-in self-test(BIST) scheme suitable for embedded memory testing in the SoC environment. The proposed BIST circuit can be programmed vis an on-chip microprocessor.

• International Journal of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.29-34
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• 2017

Over the past several decades, embedded system and flight control computer technologies have been evolved to meet the diverse needs of the mobile device market. Current embedded systems are at the heart of technologies that can take advantage of small-sized specialized hardware while still providing high-efficiency performance at low cost. One of these key technologies is multiple memory banks. For example, a dual memory bank can provide two times more memory bandwidth in the same memory space. This benefit take lower cost to provide the same bandwidth. However, there is still few software technologies to support the efficient use of multiple memory banks. In this study, we present a technique to efficiently exploit multiple memory banks by software support. Specifically, our technique use an interference graph to optimally allocate data to different memory banks by an optimizing compiler. As a result, the execution time can be improved upto 7% with the proposed technique.

• ETRI Journal
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• v.33 no.2
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• pp.230-239
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• 2011

Dynamic memory allocators for real-time embedded systems need to fulfill three fundamental requirements: bounded worst-case execution time, fast average execution time, and minimal fragmentation. Since embedded systems generally run continuously during their whole lifetime, fragmentation is one of the most important factors in designing the memory allocator. This paper focuses on minimizing fragmentation while other requirements are still satisfied. To minimize fragmentation, a part of a memory region is segregated by the proposed budgeting method that exploits the memory profile of the given application. The budgeting method can be applied for any existing memory allocators. Experimental results show that the memory efficiency of allocators can be improved by up to 18.85% by using the budgeting method. Its worst-case execution time is analyzed to be bounded.

• IEMEK Journal of Embedded Systems and Applications
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• v.13 no.5
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• pp.235-243
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• 2018

NAND flash memory has been widely used for embedded systems as storage device and the flash memory file systems such as JFFS2, YAFFS/YAFFS2 have been adopted by these embedded systems. The flash memory file systems provide the high performance and overcome the limitations of flash memory. However, these file systems don't solve the slow mount time problem when a sudden power failure happens. In this paper, we proposed a flash memory management method for enhancing the recovery performance. The proposed method manages the flash memory block type and stores the block type information at recovery image block. When file operations are occurred, our method stores the file information at the metadata block before and after the file operation. When mounting the flash memory, our method only scans the recovery image blocks and metadata blocks. The proposed method reduces the mount time by seeking the metadata block locations fast by using the recovery image blocks. We implemented the proposed method and evaluation results show that our method reduces the mount time 13 ~ 46 % compared with YAFFS2.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.6
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• pp.477-487
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• 2005

As embedded system grows in size and complexity, the importance of the technique for dynamic memory allocation has increased. The objective of this paper is to measure the performance of dynamic memory allocation by varying both hardware and software design parameters for embedded systems. Unlike torrent performance evaluation studies that have presumed the single threaded system with single address spate without OS support, our study adopts realistic environment where the embedded system runs on Linux OS. This paper contains the experimental performance analyses of dynamic memory allocation method by investigating the effects of each software layer and some hardware design parameters. Our quantitative results tan be used to help system designers design high performance, low power embedded systems.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.1
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• pp.32-40
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• 2011

For a NAND booting based embedded system, an application program on the NAND flash memory is downloaded to the RAM when the system is booted. In this case, the application program exists in both the RAM and the NAND flash so the RAM usage is increased. In this paper, we suggested the demand paging technique for the decreasing of the RAM usage for OS-less NAND booting based embedded systems. As a result of a benchmark test, 40~80% of the code memory usage was reduced with below 5% of execution time delay.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.57-64
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• 2005

In this paper, we develop the common CAD tool that creates the automatically BIST IP by user settings for the convenient test of embedded memory. Previous tools have defect that when memory model is changed, BIST IP must re-designed depending on memory model because existing tools is limited the widely used algorithms. We develop the tool that is created automatic BIST IP. It applies the algorithm according to the memory model which user requests We usually use the multi-port asynchronous SRAM needless to refresh as the embedded memory. However, This work researches on the dual-port SRAM.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.73-79
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• 2009

With the advance of VLSI technology, the capacity and density of memories are rapidly growing. In this paper we proposed MRI (Memory built-in self Repair Imagination zone) as reallocation algorithm. All faulty cells of embedded memory are reallocated into the row and column spare memory. This work implements reallocation algorithm and BISR to verify its design.

• Journal of Korea Multimedia Society
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• v.7 no.8
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• pp.1058-1065
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• 2004

Embedded system is widely used in various applications from simple monitor to a set-top box with CPU, memory and hard disk drives. Specially, embedded OS is ported in moveable or small machinery since it ordinarily transmits multimedia data. In this paper, we propose Null copy scheme on the embedded linux system for multimedia service, which can reduce memory copy overhead from user address space to kernel one, and vice versa. Since embedded system for networked multimedia service has low level computing power as well as memory, the Null copy scheme can provide more improved QoS. Our image transmission experiment results on embedded linux target board(CPU utilization an Deadline miss rates) installed a web camera have shown that the proposed scheme can increase fast response and lower CPU overhead.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.2
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• pp.61-70
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• 2008

Dynamic memory allocators are used for embedded systems to increase flexibility to manage unpredictable inputs and outputs. As embedded systems generally run continuously during their whole lifetime, fragmentation is one of important factors for designing the memory allocator. To minimize fragmentation, a budgeted memory allocator that has dedicated storage for predetermined objects is proposed. A budgeting method based on a mathematical analysis is also presented. Experimental results show that the size of the heap storage can be reduced by up to 49.5% by using the budgeted memory allocator instead of a state-of-the-art allocator. The reduced fragmentation compensates for the increased code size due to budgeted allocator when the heap storage is larger than 16KB.