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The Development on Embedded Memory BIST IP Automatic Generation System for the Dual-Port of SRAM  

Shim Eun-Sung (Department of Computing, Soongsil University)
Lee Jung-Min (Department of Computing, Soongsil University)
Lee Chan-Young (Department of Computing, Soongsil University)
Chang Hoon (Department of Computing, Soongsil University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.42, no.2, 2005 , pp. 57-64 More about this Journal
Abstract
In this paper, we develop the common CAD tool that creates the automatically BIST IP by user settings for the convenient test of embedded memory. Previous tools have defect that when memory model is changed, BIST IP must re-designed depending on memory model because existing tools is limited the widely used algorithms. We develop the tool that is created automatic BIST IP. It applies the algorithm according to the memory model which user requests We usually use the multi-port asynchronous SRAM needless to refresh as the embedded memory. However, This work researches on the dual-port SRAM.
Keywords
BIST; Dual-Port Memory; SRAM; Embedded Memory;
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