• 대한임베디드공학회논문지
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• 제4권4호
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• pp.174-179
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• 2009

Due to digital convergence, mobile embedded systems need more functionalities and a fully fledged OS. Applications for such embedded systems are linked with many shared libraries available in the OS and access a large data set at launch time. This results in increased application launch time. In this paper, we propose two techniques for reducing the application launch time: lazy-loading and pinning. Lazy-loading defers loading shared libraries that are not used in the application at launch time, whereas pinning guarantees the residence of shared libraries and data used at launch time in the main memory.

• 대한임베디드공학회논문지
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• 제12권4호
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• pp.239-246
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• 2017

Time synchronization between distributed embedded systems in the Real Time Locating System (RTLS) based on Time Difference of Arrival (TDOA) is one of the most important factors to consider in system design. Clock jitter error between each system causes many difficulties in maintaining such a time synchronization. In this paper, we implemented a system to synchronize clocks between FPGA based distributed embedded systems using the recovery clock of CDR (clock data recovery) used in high speed serial communication to solve the clock jitter error problem. It is experimentally confirmed that the cumulative time error that occurs when the synchronization is not performed through the synchronization logic using the CDR recovery clock can be completely eliminated.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.690-693
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• 2002

According to the growth of communication biz, embedded market rapidly developing in domestic and overseas. Embedded system can be used in various way such as wire and wireless communication equipment or information products. There are lots of developing performance applying speech recognition to embedded system, for instance, PDA, PCS, CDMA-2000 or IMT-2000. This study implement minimum memory of speech recognition engine and DB for apply real time embedded system. The implement measure of speech recognition equipment to fit on embedded system is like following. At first, DC element is removed from Input voice and then a compensation of high frequency was achieved by pre-emphasis with coefficients value, 0.97 and constitute division data as same size as 256 sample by lapped shift method. Through by Levinson - Durbin Algorithm, these data can get linear predictive coefficient and again, using Cepstrum - Transformer attain feature vectors. During HMM training, We used Baum-Welch reestimation Algorithm for each words training and can get the recognition result from executed likelihood method on each words. The used speech data is using 40 speech command data and 10 digits extracted form each 15 of male and female speaker spoken menu control command of Embedded system. Since, in many times, ARM CPU is adopted in embedded system, it's peformed porting the speech recognition engine on ARM core evaluation board. And do the recognition test with select set 1 and set 3 parameter that has good recognition rate on commander and no digit after the several tests using by 5 proposal recognition parameter sets. The recognition engine of recognition rate shows 95%, speech commander recognizer shows 96% and digits recognizer shows 94%.

• 한국컴퓨터정보학회논문지
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• 제10권6호
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• pp.103-116
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• 2005

PDA와 같은 내장형 컴퓨팅 기술이 발달하면서 PIMS와 같은 다양한 응용들이 개발되었다. 그리고, 이들 응용 시스템들간 XML 문서를 통한 데이터 공유와 정보 교환이 활발히 이루어지고 있다. 이에 따라 데이터 처리량이 점점 증가하게 되어 내장형 시스템에서도 XML 문서 데이터베이스 관리 시스템의 필요성이 점점 대두되고 있다. 그런데 하드웨어적으로 많은 제약을 갖는 대부분의 내장형 시스템에서는 XML 문서를 처리하기 위하여 자체 파일 시스템을 이용하고 있다. 이로 인해 타 응용과의 효율적인 데이터 공유와 정보 교환, 그리고 효율적인 데이터 처리에 많은 애로사항이 발생하고 있다. 본 논문에서는 이러한 내장형 시스템 응용의 XML 문서를 통한 데이터 공유와 정보 교환을 효율적으로 지원하기 위한 내장형 XML문서 데이터베이스 관리 시스템을 설계 및 구현하였다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2004년도 ICCAS
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• pp.1655-1658
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• 2004

In this paper, we design and implement remote servo motor control system with real-time micro embedded operating system. The system, where controller and camera image grabber are mounted, handles control commands transmitted from a remote PC web browser. A hard real-time servo motor driver running on the real-time micro embedded OS and then a digital control application which confirms precise sampling time intervals is constructed. Frame grabber images transmitted from camera are saved in a image data format to view on remote PC web browser.

• Journal of Information Display
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• 제10권1호
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• pp.37-44
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• 2009

AiPi technology incorporates an embedded clock and control scheme with a point-to-point bus topology, thereby having the smallest possible number of interface lines between a timing controller and column drivers. A point-to-point architecture boosts the data rate and reduces the number of interface lines, because impedance matching can be easily achieved. An embedded clock and control scheme is implemented by means of multi-level signalling, which results in a simple clock/data recovery circuitry. A 46" AiPi-based 10-bit FHD prototype requires only 20 interface lines, compared to 38 lines for mini-LVDS. The measured maximum data rate per data pair is more than 800 Mbps.

• 대한임베디드공학회논문지
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• 제8권5호
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• pp.255-264
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• 2013

Resolving of memory access latency is one of the most important problems in modern embedded system design. Recently, tons of studies are presented to reduce and hide the access latency. Burst/page data transfer modes are representative hardware techniques for achieving such purpose. The burst data transfer capability offers an average access time reduction of more than 65 percent for an eight-word sequential transfer. However, solution of utilizing such burst data transfer to improve memory performance has not been accomplished at commercial level. Therefore, this paper presents a new technique that provides the maximum utilization of burst transfer for memory accesses with local variables in code by reorganizing variables placement.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2011년도 춘계학술대회 논문집
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• pp.723-724
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• 2011

• 전자공학회논문지CI
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• 제44권1호
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• pp.1-9
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• 2007

임베디드 프로세서는 총 에너지소모량 가운데 대략 40% 이상을 캐시에서 소모하고 있으므로 에너지-효율적 고성능 데이터 캐시 구조를 필요로 한다. 본 논문에서는 임베디드 프로세서를 위한 저전력 선인출 데이터캐시 구조를 제안하였다. 제안한 데이터캐시 구조는 선인출장치(prefetching unit)를 포함한 기존 데이터캐시 구조에 태그히스토리 테이블(tag history table)을 구비함으로써 요구인출 및 선인출시 발생하는 태그메모리 병렬탐색 횟수를 감소시켰다. 이와 같은 전략적인 캐시 구조는 적은 하드웨어 비용으로 병렬탐색을 위한 전력소모를 현저히 줄일 수 있다. 실험을 통하여 제안한 데이터캐시 구조가 기존 선인출 데이터캐시 구조와 동일한 성능을 유지하면서 낮은 전력을 요구함을 확인하였다.

• 한국멀티미디어학회논문지
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• 제8권9호
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• pp.1153-1162
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• 2005

SyncML(Synchronization Markup Language) 프레임워크인 Sync4j와 내장형 데이터베이스 관리 시스템인 버클리 DB XML을 기반으로 한 XML 문서 데이터 동기화 시스템 XDS4j(XML Document Data Synchronization System for java)를 제안한다. 기존의 데이터 동기화 시스템들은 파일 시스템 기반으로 데이터를 갱신하므로, Fast Sync때 데이터 동기화 시간을 매우 지연시킨다. 이에 비해 XDS4j에서는 SyncML 클라이언트와 SyncML 서버의 XML 문서 데이터를 버클리 DB XML을 이용하여 관리하며, Fast Sync때 특정 데이터의 갱신은 XPath를 적용하여 갱신될 XML 문서의 해당 요소만 접근하게 함으로써 데이터 동기화 시간을 줄인다.