• IEIE Transactions on Smart Processing and Computing
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• 제3권2호
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• pp.96-102
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• 2014

The embedded processor market has grown rapidly and consistently with the appearance of mobile devices. In an embedded system, the power consumption and execution time are important factors affecting the performance. The system performance is determined by both hardware and software. Although the hardware architecture is high-end, the software runs slowly due to the low quality of codes. This study compared the performance of two major compilers, LLVM and GCC on a32-bit EISC embedded processor. The dynamic instructions and static code sizes were evaluated from these compilers with the EEMBC benchmarks.LLVM generally performed better in the ALU intensive benchmarks, whereas GCC produced a better register allocation and jump optimization. The dynamic instruction count and static code of GCCwere on average 8% and 7% lower than those of LLVM, respectively.

• 방송공학회논문지
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• 제21권5호
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• pp.792-802
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• 2016

최근 사용이 늘어나고 있는 멀티밴드 사운드바 설계 시, 설계검증은 시뮬레이션으로 확인이 되지 않거나 되기 힘든 검증요소들이 다수 존재한다. 따라서 본 논문에서는 프로세서 내장 사운드바 SoC를 위한 FPGA 검증시스템을 구현하였다. 이를 통해 설계단계의 시뮬레이션으로 검증할 수 없는 실시간 성능테스트와 청취테스트를 실시간 검증하였다. 즉, 구현된 FPGA 검증시스템을 이용해서 SNR, THD+N, 주파수응답과 같은 정량적 항목들의 측정 및 청취테스트를 시행하였고, 테스트 결과가 설계목표를 만족함을 확인하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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• pp.608-611
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• 2003

A large part of the embedded system, compared with the PC, have low performance CPU and small memory. So the embedded operating system fits the condition of that hardware system. A Single Address Space (SAS) OS has the operating system and all applications in the single address space. The SAS architecture enhances sharing and co-operation, because addresses have a unique interpretation. Thus, pointer-based date structures can be directly communicated and shared between programs at any time, and can be stored directly on storage. The key point of the SAS OS on the embedded system is the low overhead inter-action between programs in process and usage. So SAS OS can be ported on the low performance CPU. In this paper, we design the SAS OS (named emNOS, Embedded Network Operating System) on the ARMTTDMI processor. Finally we show the benefits of the SAS OS on the embedded system.

• ETRI Journal
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• 제31권6호
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• pp.732-740
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• 2009

This paper describes the implementation of a digital audio effect system-on-a-chip (SoC), which integrates an embedded digital signal processor (DSP) core, audio codec intellectual property, a number of peripheral blocks, and various audio effect algorithms. The audio effect SoC is developed using a software and hardware co-design method. In the design of the SoC, the embedded DSP and some dedicated hardware blocks are developed as a hardware design, while the audio effect algorithms are realized using a software centric method. Most of the audio effect algorithms are implemented using a C code with primitive functions that run on the embedded DSP, while the equalization effect, which requires a large amount of computation, is implemented using a dedicated hardware block with high flexibility. For the optimized implementation of audio effects, we exploit the primitive functions of the embedded DSP compiler, which is a very efficient way to reduce the code size and computation. The audio effect SoC was fabricated using a 0.18 ${\mu}m$ CMOS process and evaluated successfully on a real-time test board.

• 대한전자공학회논문지TC
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• 제44권4호
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• pp.72-79
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• 2007

본 논문은 X-HYPER Intel PXA255 ARM CPU를 이용하여 임베디르 리눅스운영체제를 기반으로 구현한 시스템에서 RFID 리더를 통해 읽어 들인 태그 정보를 도서관 관리 시스템에 적용하기 위한 RFID 미들웨어를 설계 및 구현하였다. 구현한 임베디드 리눅스 기반의 RFID 미들웨어는 크게 RFID 모듈, ARM 프로세서, RS-232 인터페이스 등으로 구성된다. RFID 모듈은 사용자 및 도서정보를 입력 받기 위하여 사용되며, RS-232 인터페이스를 통하여 RFID 미들웨어로 정보를 전달한다. 또한 본 시스템은 임베디드 전용 ARM 프로세서를 사용하여 도서관 관리 시스템에 특화된 시스템을 구현하였다. 본 논문에서는 RFID 미들웨어의 개념 및 동작원리를 소개하고 임베디드 리눅스기반에서 Qt/Embedded를 사용한 무인 대출 및 반납 시스템을 구현하였다.

• 전기학회논문지
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• 제58권10호
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• pp.2059-2063
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• 2009

This paper presents a programmable System-On-a-chip (SoC) for various embedded smart applications that need Neural Network computations. The system is fully implemented into a prototyping platform based on Field Programmable Gate Array (FPGA). The SoC consists of an embedded processor core and a reconfigurable hardware accelerator for neural computations. The performance of the SoC is evaluated using a real image processing application, an optical character recognition (OCR) system.

• 대한임베디드공학회논문지
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• 제8권1호
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• pp.17-24
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• 2013

In this paper, we present a multi-core processor including multimedia specific instructions to process multimedia data efficiently in the mobile environment. Multimedia specific instructions exploit subword level parallelism (SLP), while the multi-core processor exploits data level parallelism (DLP). These combined parallelisms improve the performance of multimedia processing applications. The proposed multi-core processor including multimedia specific instructions is implemented and tested using a Xilinx ISE 10.1 tool and SoCMaster3 testbed system including Vertex 4 FPGA. Experimental results using a fire detection algorithm show that multimedia specific instructions outperform baseline instructions in the same multi-core architecture in terms of performance (1.2x better), energy efficiency (1.37x better), and area efficiency (1.23x better).

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.105-108
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• 2001

4 32-bit RISC core is designed for embedded application and DSP. This processor offers low power consumption by fully static operation and compact code size by efficient instruction set. Processor performance is improved by wing conditional instruction execution, block data transfer instruction, multiplication instruction, bunked register file structure. To support compact code size of embedded application, It is capable cf executing both 16-bit instructions and 32-bit instruction through mixed mode instruction conversion Furthermore, for fast MAC operation for DSP applications, the processor has a dedicated hardware multiplier, which can complete a 32-bit by 32-bit integer multiplication within seven clock cycles. These result in high instruction throughput and real-time interrupt response. This chip is implemented with 0.35${\mu}{\textrm}{m}$, 4- metal CMOS technology and consists of about 50K gate equivalents.

• 정보처리학회논문지D
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• 제15D권3호
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• pp.355-360
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• 2008

복잡한 임베디드 시스템의 멀티태스킹 지원은 실시간 운영체제가 요구된다. 이종의 임베디드 시스템 개발 환경에서 각각의 시스템에 최적화 된 운영체제와 프로세서를 사용한다. 본 논문에서는 이종 임베디드 시스템 개발 시 기존의 크로스 컴파일러 대신, 운영체제의 API 정보 및 프로세서 레지스터 구성 정보의 UML 프로파일화 방식을 제안한다. 이는 각각의 임베디드 시스템에 적합한 프로파일을 이용해 이종의 시스템 개발 환경을 선택하여 자동 코드 발생을 통해 개발 기간 및 비용을 단축할 수 있다. 적용사례로서 이종 시스템 프로파일 정보를 이용해 이종의 실시간 운영체제 (brickOS와 uC/OS-II) 및 프로세서(Hitachi H8과 Intel PXA255)에 맞는 모델 및 코드를 생성하여 포팅 하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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• pp.653-656
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• 2003

We have designed embedded web sewer system and ported Linux operating system version 2.4.5 at our system. And then We implemented to control and monitor widely separated hardware and implemented to monitor widely separated image using CMOS image sensor HV7131B. Web server is the Boa web server with General Public License. We designed for this system using of Intel's SA1110 ARM core base processor and connecting input and output device at GPIO port of SA1110. Device driver of General purpose I/O for Embedded Linux OS is designed. And then the application program controlling driver is implemented to use of common gate interface C language. User is available to control and monitor at client PC. This method have benefit to reduce the Expenditure of hardware design and development time against PC base system and have various and capacious application against firmware base system.