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http://dx.doi.org/10.14372/IEMEK.2013.8.1.017

Implementation and Verification of a Multi-Core Processor including Multimedia Specific Instructions  

Seo, Jun-Sang (University of Ulsan)
Kim, Jong-Myon (University of Ulsan)
Publication Information
IEMEK Journal of Embedded Systems and Applications / v.8, no.1, 2013 , pp. 17-24 More about this Journal
Abstract
In this paper, we present a multi-core processor including multimedia specific instructions to process multimedia data efficiently in the mobile environment. Multimedia specific instructions exploit subword level parallelism (SLP), while the multi-core processor exploits data level parallelism (DLP). These combined parallelisms improve the performance of multimedia processing applications. The proposed multi-core processor including multimedia specific instructions is implemented and tested using a Xilinx ISE 10.1 tool and SoCMaster3 testbed system including Vertex 4 FPGA. Experimental results using a fire detection algorithm show that multimedia specific instructions outperform baseline instructions in the same multi-core architecture in terms of performance (1.2x better), energy efficiency (1.37x better), and area efficiency (1.23x better).
Keywords
Multimedia specific instructions; Multi-core processors; Area efficiency; Energy efficiency;
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