• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.185-189
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• 2002

Flexible displays such as plastic based LCDs and organic light-emitting diodes for mobile communication devices have been researched and developed at KETI in KOREA since 1997. The Plastic film substrate has so poor thermal tolerance and non-rigidness that the fabrication of active devices and panel assembly have to perform at low temperature and pressure. In addition, high thermal expansion of the substrate is also a serious problem for reliable metallic film deposition. In this paper, we investigated particularly on the fundamental characteristics of various plastic substrates and then, suggested novel methods that improve the fabrication processes of plastic LCD panel. In order to maintain stable substrate surface and uniform cell gap during panel assembly, we utilized newly-invented iii and vacuum chuck. Electro-optical characteristics of fabricated plastic LCD are better than or equivalent to those of typical glass based LCDs though it is thinner, lighter-weight and more robust.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.3-6
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• 2002

Plasma processing plays a significant role in semiconductor devices technology. Development of new plasma systems, such as high-density plasma reactors, required development of plasma theory to understand a whole process mechanism and to be able to explain and to predict processing results. A most important task in this way is to establish interconnections between input process parameters (working gas, pressure, flow rate, input power density) and various plasma subsystems (electron gas, volume and heterogeneous gas chemistry, transport), which are closely connected one with other. It will allow select optimal ways for processes optimization.

• Electrical & Electronic Materials
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• v.7 no.2
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• pp.152-156
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• 1994

The rapid thermal annealing effects of Sol-Gel derived ferroelectric PZT thin films were investigated. It was found that rapid thermal annealing(RTA) of spin coated thin films on silicon typically >$800^{\circ}C$ for about 1 min. was changed to the perovskite phase. Rapid thermally annealed films recorded maximum remanent polarization of about 5 .mu.C/cm$^{2}$, coercive field of around 30kV/cm. The switching time for polarization reversal was about 220ns. The films of RTA process showed smooth surface, and high breakdown voltages of over 1 MV/cm and resistivity of $1{\times}{10^12}$ .ohm.cm at 1 MV/cm. It was verified that the polarization reversal of the PZT film was varied partially with applying the multiple short pulse.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.11
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• pp.969-975
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• 2002

Thin film transistors(TFT) were made based on the polycrystalline Si (poly-Si) crystallized by sequential lateral solidification(SLS) method. The electrical characteristics of the devices were analyzed. n-type TFTs did not show a superior characteristics compared to p-type TFTs. We analyzed the causes of the failure by focused ion beam(FIB) analysis and automatic spreading resistance(ASR) measurement, to study the structural integrity and the doping distribution, respectively. FIB showed no structural problems but it revealed a non-intermixed layer in the contact holes between the polysilicon and the aluminum electrode. ASR analyses on poly-Si layer with various doping concentrations and activation temperatures showed that the inadequately doped areas were partially responsible for the inferior behavior of the whole device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.10
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• pp.844-850
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• 2002

Linearly graded profiles on the field area oxide are frequently used in power integrated circuits to reduce the surface electric field when power devices are operated in forward or reverse blocking modes. It is shown here that tapered windows can be made using the difference of etch rates between the bottom and the top layer of TEOS film. Annealed TEOS films are etched at a lower rate than the TEOS film without annealing Process. The fast etching layer results in window walls having slopes in the range of 25$^{\circ}$∼ 80$^{\circ}$ with respect to the wafer surface. Taper etching technique by annealing the TEOS film applies to high voltage LDMOS, which is compatible with CMOS process, due to the minimum changes in both of design rules and thermal budget.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.814-817
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• 2003

As additive Pt of a little to $SnO_2$ that gas sensing property is superior oxide-semiconductor material to fabricate gas sensor that operation is possible at room temperature and fabricated ceramic gas sensing devices. And, the change amount and sintering temperature of addition material investigated gas sensitivity by change of operation temperature, humidity relativity, Long-term stability and hysteresis. And achieved SEM and XRD analysis for characteristics searching examination of devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.3-6
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• 2004

Power semiconductor devices are being compact, high performance and intelligent thanks to recent remarkable developments of silicon design, process and related packaging technologies. Developments of MOS-gate transistors such as MOSFET and IGBT are dominant thanks to their advantages on high speed operation. In conjunction with package technology, silicon technologies such as trench, charge balance and NPT will support future power semiconductors. In addition, wide band gap material such as SiC and GaN are being studies for next generation power semiconductor devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.05b
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• pp.335-338
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• 2000

SrS:Ce thin films for blue EL devices are prepared by Hot Wall Method and their crystallographic and optical characteristics are investigated by various methods. Deposition rates are decreased with substrate temperature, but increased with SrS cell temperature. The crystallographic characteristics are strongly affected by deposition rates. The peak of photoluminescence are found at 470 and 540nm.

• Transactions on Electrical and Electronic Materials
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• v.11 no.6
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• pp.243-248
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• 2010

The emergence of different and disparate materials together with the convergence of both the 'old' and 'emerging' technologies is paving the way for integration of heterogeneous technologies that are likely to extend the limitations of silicon technology beyond the roadmap envisaged for complementary metal-oxide semiconductor. Formulation of new information processing concepts based on novel aspects of nano-scale based materials is the catalyst for new nanoarchitectures driven by a different perspective in realization of novel logic devices. The memory technology has been the pace setter for silicon scaling and thus far has pave the way for new architectures. This paper provides an overview of the inevitability of heterogeneous integration of technologies that are in their infancy through initiatives of material physicists, computational chemists, and bioengineers and explores the options in the spectrum of novel non-volatile memory technologies considered as forerunner of new logic devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.10-10
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• 2010

ESD (Electrostatic Discharge) phenomenon occurs in everywhere and especially it damages to semiconductor devices. For ESD protection, there are some devices such as diode, GGNMOS (Gate-Grounded NMOS), SCR (Silicon-Controlled Rectifier), etc. Among them, diode and GGNMOS are usually chosen because of their small size, even though SCR has greater current capability than GGNMOS. In this paper, a novel SCR is proposed on the SOI (Silicon-On-Insulator) structure which has $1{\mu}m$ film thickness. In order to design and confirm the proposed SCR, TSUPREM4 and MEDICI simulators are used, respectively. According to the simulation result, although the proposed SCR has more compact size, it's electrical performance is better than electrical characteristics of conventional GGNMOS.