• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.419-420
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• 2012

Lithium-ion battery (LIB) usually used for valuable electronic devices are extended to applications. High stability negative electrode materials for LIB were investigated using electrodeposition of nanoparticles (NPs) on the nanostructured carbon. NPs with about 70 nm diameters were evenly prepared on the graphitic carbon materials using electrodeposition process at room temperature. It was observed that the NPs were homogeneously embedded into not only external surface but bottom part of the graphitic carbon network. The graphitic carbon material covered with NPs enables facile electron transport owing to the network structure and improves structural collapse during cycling. This facile room temperature process is expected to be applicable to other anode materials such as Sn and Al for the anode of LIB.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.362-362
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• 2012

Graphene-based materials have been gaining the unprecedented academic and industrial applications, due to the unique charge transport as a new kind of 2-dimensional materials. The applications incorporate electronic devices, nonvolatile memories, batteries, chemical sensors, etc. based on the electrical, mechanical, structural, optical, and chemical features newly reported. The current work employs thermal chemical vapor deposition involving H2 and CH4, in order to synthesize the 2-dimensional graphene materials. The qualitative/quantitative characterizations of the synthesized graphene materials are evaluated using Raman spectroscopy and Hall Measurements, In particular, the effect of processing variables is systematically investigated on the formation of graphene materials through statistical design of experiments. The optimized graphene materials will be attempted towards the potential applications to flat-panel displays.

• ETRI Journal
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• v.29 no.3
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• pp.371-380
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• 2007

This paper proposes a new automatic compensation network (ACN) for a system-on-chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on-chip ACN using 0.18 ${\mu}m$ SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design-for-testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.

• ETRI Journal
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• v.40 no.2
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• pp.167-179
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• 2018

This paper proposes an IEEE 802.15.4m compliant TV white-space orthogonal frequency-division multiplexing (TVWS)-(OFDM) radio frequency (RF) transceiver that can be adopted in advanced metering infrastructures, universal remote controllers, smart factories, consumer electronics, and other areas. The proposed TVWS-OFDM RF transceiver consists of a receiver, a transmitter, a 25% duty-cycle local oscillator generator, and a delta-sigma fractional-N phase-locked loop. In the TV band from 470 MHz to 698 MHz, the highly linear RF transmitter protects the occupied TV signals, and the high-Q filtering RF receiver is tolerable to in-band interferers as strong as -20 dBm at a 3-MHz offset. The proposed TVWS-OFDM RF transceiver is fabricated using a $0.13-{\mu}m$ CMOS process, and consumes 47 mA in the Tx mode and 35 mA in the Rx mode. The fabricated chip shows a Tx average power of 0 dBm with an error-vector-magnitude of < 3%, and a sensitivity level of -103 dBm with a packet-error-rate of < 3%. Using the implemented TVWS-OFDM modules, a public demonstration of electricity metering was successfully carried out.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1016-1021
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• 2003

The overall size of electronic product is becoming small according to development of technology. Accordingly it is difficult to inspect these small components by human eyes. So, an automation system for inspecting them has been used. The existing system put microprocessor or Programmable Logic Controller (PLC) use. The structure of microprocessor-based controller and PLC use basically composed of memory devices such as ROM, RAM and I/O ports. Accordingly, the system is not only becomes complicated and enlarged but also higher price. In this paper, we implement FPGA-based One-chip Programmable Timing Controller for Inspecting Small components to resolve above problems and design the high performance controller by using VHDL. With fast development, the FPGA of high capacity that can have memory and PLL have been introduced. By using the high-capacity FPGA, the peripherals of the existent controller, such as memory, I/O ports can be implemented in one FPGA. By doing this, because the complicated system can be simplified, the noise and power dissipation problems can be minimized and it can have the advantage in price. Since the proposed controller is organized to have internal register, counter, and software routines for generating timing signals, users do not have to problem the details about timing signals and need to only send some values about an inspection system through an RS232C port. By selecting theses values appropriate for a given inspection system, desired timing signals can be generated.

• Journal of Industrial Technology
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• v.21 no.B
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• pp.133-139
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• 2001

Generally $PbTiO_3$ is manufactured in a form of thin films which is useful for the application of infrared sensors and non-volatile memory devices. Moreover $PbTiO_3$ has a characteristic of adsorption for organic acid as well as electronic property. Organic acid adsorption properties of $PbTiO_3$ powder prepared by sol-gel method was compared with the powder purchased from Aldrich Co. Crystallization and particle size of $PbTiO_3$ are influenced by process variables, such as dilution of sol solution, catalysis, calcination temperature, calcination time, etc. As the size of $PbTiO_3$ power decreased until several nanometers, adsorption of acetic acid and formic acid was increased 1.5-fold and 1.2-fold respectively.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.9-14
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• 2012

Robust power delivery and distribution are considered one of the major challenges in electronic devices today. As a technology develops (i.e. frequency and complexity, increase and size decreases), both power density and power supply noise increase, and voltage supply margin decreases. In addition, thermal problem is induced due to high power and poor power distribution. Until now most of studies to improve power delivery and distribution have been focused on device circuit or system architecture designs. Interconnect process technologies to resolve power delivery issues have not greatly been explored so far, but recently it becomes of great interest as power increases and voltage specification decreases in a smaller chip size.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.15-20
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• 2012

In electronics industry, the coming electronic devices will be expected to be high integration and convergence electronics. And also, it will be expected that the coming electronics will be flexible, bendable and wearable electronics. Therefore, the demands and interests of bonding technology between flexible substrate and chip for mobile electronics, e-paper etc. have been increased because of weight and flexibility of flexible substrate. Considering fine pitch for high density and thermal damage of flexible substrate during bonding process, the micro solder bump technology for high density and low temperature bonding process for reducing thermal damage will be required. In this study, we researched on bonding technology of chip and flexible substrate by using 25um Cu pillar bumps and Sn-Bi solder bumps were formed by electroplating. From the our study, we suggest technology on Cu pillar bump formation, Sn-Bi solder bump formation, and bonding process of chip and flexible substrate for the coming electronics.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.387.1-387.1
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• 2016

Transparent materials are necessary for most photoelectric devices, which allow the light generation from electric energy or vice versa. Metal oxides are usual materials for transparent conductors to have high optical transmittance with good electrical properties. Functional designs may apply in various applications, including solar cells, photodetectors, and transparent heaters. Nanoscale structures are effective to drive the incident light into light-absorbing semiconductor layer to improve solar cell performances. Recently, the new metal oxide materials have inaugurated functional device applications. Nickel oxide (NiO) is the strong p-type metal oxide and has been applied for all transparent metal oxide photodetector by combining with n-type ZnO. The abrupt p-NiO/n-ZnO heterojunction device has a high transmittance of 90% for visible light but absorbs almost entire UV wavelength light to show the record fastest photoresponse time of 24 ms. For other applications, NiO has been applied for solar cells and transparent heaters to induce the enhanced performances due to its optical and electrical benefits. We discuss the high possibility of metal oxides for current and future transparent electronic applications.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.302.1-302.1
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• 2016

Solution-processed amorphous metal-oxide thin-film transistors (TFTs) are considered as promising candidates for the upcoming transparent and flexible electronics due to their transparent property, good performance uniformity and possibility to fabricate at a low-temperature. In addition, solution processing metal oxide TFTs may allow non-vacuum fabrication of flexible electronic which can be more utilizable for easy and low-cost fabrication. Recently, for high-mobility oxide TFTs, multi-layered oxide channel devices have been introduced such as superlattice channel structure and heterojunction structure. However, only a few studies have been mentioned on the bias illumination stress in the multi- layered oxide TFTs. Therefore, in this research, we investigated the effects of bias illumination stress in solution-processed bilayer oxide TFTs which are fabricated by the deep ultraviolet photochemical activation process. For studying the electrical and stability characteristics, we implemented positive bias stress (PBS) and negative bias illumination stress (NBIS). Also, we studied the electrical properties such as field-effect mobility, threshold voltage ($V_T$) and subthreshold slop (SS) to understand effects of the bilayer channel structure.