• The Journal of the Korea institute of electronic communication sciences
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• v.19 no.1
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• pp.149-156
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• 2024

The increased intelligence and speed of vehicle infotainment, whose main purpose was emergency and external communication, is showing the potential for application to various services such as navigation and autonomous driving. In particular, functionality for linking external devices and infrastructure is being strengthened due to advances in communication and networks. Under this trend, it is necessary to consider the direction of linkage with the cooperative intelligent transportation system (C-ITS) for advanced vehicle services and driving. In addition, in the case of automobiles, future vehicle development concepts are being established based on the concept of software-defined vehicles (SDVs) in line with the trend of electrification beyond telematics and infotainment advancements, and such SDV linkage must be considered at the same time. In this paper, we consider the future direction of ITS and SDV linkage based on analysis of vehicle infotainment structure. First, for this purpose, we analyze the existing vehicle infotainment structure and architecture, and also present the structure of the SDV linked to it. Based on this, analysis and implications are drawn on the possibility of applying and linking standard-based C-ITS services with SDV devices.

• Industry Promotion Research
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• v.9 no.1
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• pp.21-29
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• 2024

In the rapidly advancing information society, electronic devices, including smartphones and tablets, are increasingly digitized and equipped with high-performance features such as flexible displays. This study focused on optimizing the manufacturing process for Transparent Conductive Films (TCF) by using the cost-effective conductive polymer PEDOT and transparent substrate PET as alternatives to expensive materials in flexible display technology. The variables considered are production speed (m/min), coating maximum temperature (℃), and PEDOT supply speed (rpm), with surface resistivity (Ω/□) as the response parameter, using Response Surface Methodology (RSM). Optimization results indicate the ideal conditions for production: a speed of 22.16 m/min, coating temperature of 125.28℃, and PEDOT supply at 522.79 rpm. Statistical analysis validates the reliability of the results (F value: 18.37, P-value: < 0.0001, R²: 0.9430). Under optimal conditions, the predicted surface resistivity is 145.75 Ω/□, closely aligned with the experimental value of 142.97 Ω/□. Applying these findings to mass production processes is expected to enhance production yields and decrease defect rates compared to current practices. This research provides valuable insights for the advancement of flexible display manufacturing.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.10
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• pp.4717-4737
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• 2017

Today, smart grids, smart homes, smart water networks, and intelligent transportation, are infrastructure systems that connect our world more than we ever thought possible and are associated with a single concept, the Internet of Things (IoT). The number of devices connected to the IoT and hence the number of traffic flow increases continuously, as well as the emergence of new applications. Although cutting-edge hardware technology can be employed to achieve a fast implementation to handle this huge data streams, there will always be a limit on size of traffic supported by a given architecture. However, recent cloud-based big data technologies fortunately offer an ideal environment to handle this issue. Moreover, the ever-increasing high volume of traffic created on demand presents great challenges for flow management. As a solution, flow aggregation decreases the number of flows needed to be processed by the network. The previous works in the literature prove that most of aggregation strategies designed for smart grids aim at optimizing system operation performance. They consider a common identifier to aggregate traffic on each device, having its independent static aggregation policy. In this paper, we propose a dynamic approach to aggregate flows based on traffic characteristics and device preferences. Our algorithm runs on a big data platform to provide an end-to-end network visibility of flows, which performs high-speed and high-volume computations to identify the clusters of similar flows and aggregate massive number of mice flows into a few meta-flows. Compared with existing solutions, our approach dynamically aggregates large number of such small flows into fewer flows, based on traffic characteristics and access node preferences. Using this approach, we alleviate the problem of processing a large amount of micro flows, and also significantly improve the accuracy of meeting the access node QoS demands. We conducted experiments, using a dataset of up to 100,000 flows, and studied the performance of our algorithm analytically. The experimental results are presented to show the promising effectiveness and scalability of our proposed approach.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.2
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• pp.169-175
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• 2020

This paper studied the SET situation in VLSI because the electronic devices exposed to SET can indicate irregular operation and output errors. The SET environment was established using the exponential static wave (iexp) in the fold-cascode comparator. The comparator was experimented with how it affected it by the SET. In a folded comparator that did not enter the SET situation, the propagation delay was measured at 0.26㎲ and the gain was 0.649. The MOSFET close to the output stage was measured sensitively in the folded comparator that entered the SET situation. And propagation delay was calculated from 0.36 to 0.37㎲ and the gain was 0.649. The mid-position MOSFET was calculated from 0.28 to 0.30㎲ and the gain was 0.649. The MOSFET, which is farthest from the output stage from the folded comparator, was calculated with the propagation delay between 0.25 and 0.26㎲ and the gain of 0.649. In SET situations, the MOSFET close to the output portion of the folded comparator was sensitive. And at the MOSFET far from the output, the same results were obtained as a normal folded comparator without the SET input.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.1
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• pp.8-18
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• 2000

We presented a BGA(Ball Grid Array) package for RF circuit modules and extracted its electrical parameters. As the frequency of RF system devices increases, the effect of its electrical parasitics in the wireless communication system requires new structure of RF circuit modules because of its needs to be considered of electrical performance for minimization and module mobility. RF circuit modules with BGA packages can provide some advantages such as minimization, shorter circuit routing, and noise improvement by reducing electrical noise affected to analog and digital mixed circuits, etc. We constructed a BGA package of ITS(Intelligent Transportation System) RF module and measured electrical parameters with a TDR(Time Domain Reflectometry) equipment and compared its electrical parasitic parameters with PCB RF circuits. With a BGA substrate of 3${\times}$3 input and output terminals, we have found that self capacitance of BGA solder ball is 68.6fF, and self inductance 146pH, whose values were reduced to 34% and 47% of the value of QFP package structure. S11 parameter measurement with a HP4396B Network Analyzer showed the resonance frequency of 1.55GHz and the loss of 0.26dB. Routing length of the substrate was reduced to 39.8mm. Thus, we may improve electrical performance when we use BGA package structures in the design of RF circuit modules.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.10
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• pp.82-90
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• 2011

Because of the development of Smart phone devices, the demands of high performance FPU(Floating-point Unit) becomes increasing. Therefore, we propose the high-speed single-/double-precision FPU design that includes an elementary add/sub unit and improved multiplier and compare and convert units. The most commonly used add/sub unit is optimized by the parallel rounding unit. The matrix operation is used in complex calculation something like a graphic calculation. We designed the Multiply-Add Fused(MAF) instead of multiplier to calculate the matrix more quickly. The branch instruction that is decided by the compare operation is very frequently used in various programs. We bypassed the result of the compare operation before all the pipeline processes ended to decrease the total execution time. And we included additional convert operations that are added in IEEE754-2008 standard. To verify our RTL designs, we chose four hundred thousand test vectors by weighted random method and simulated each unit. The FPU that was synthesized by Samsung's 45-nm low-power process satisfied the 600-MHz operation frequency. And we confirm a reduction in area by comparing the improved FPU with the existing FPU.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.183-183
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• 2014

Recently, multiferroic materials gain much attention due to their fascinating fundamental physical properties. These materials offer wide range of potential applications such as data storage, spintronic devices and sensors, where both electronic and magnetic polarizations can be coupled. Among single-phase multiferroic materials, $BiFeO_3$ is typical because of the room-temperature magnetoelectric coupling in view of long-range magnetic- and ferroelectric-ordering temperatures. However, $BiFeO_3$ is well known to have large leakage current and small spontaneous polarization due to the existence of oxygen vacancies and other defects. Furthermore the magnetic moment of pure $BiFeO_3$ is very weak owing to its antiferromagnetic nature. Recently, various attempts have been performed to improve the multiferroic properties of $BiFeO_3$ through the co-doping at the A and the B sites, by making use of the fact that the intrinsic polarization and magnetization are associated with the lone pair of $Bi^{3+}$ ions at the A sites and the partially-filled 3d orbitals of $Fe^{3+}$ ions at the B sites, respectively. In this study, $BiFeO_3$, $Bi_{0.9}Ho_{0.1}FeO_3$, $BiFe_{0.97}Ni_{0.03}O_3$ and $Bi_{0.9}Ho_{0.1}Fe_{0.97}Ni_{0.03}O_3$ bulk compounds were prepared by solid-state reaction and rapid sintering. High-purity $Bi_2O_3$, $Ho_2O_3$, $Fe_2O_3$ and $NiO_2$ powders with the stoichiometric proportions were mixed, and calcined at $500^{\circ}C$ for 24 h to produce the samples. The samples were immediately put into an oven, which was heated up to $800^{\circ}C$ and sintered in air for 1 h. The crystalline structure of samples was investigated at room temperature by using a Rigaku Miniflex powder diffractometer. The field-dependent and temperature-dependent magnetization measurements were performed with a vibrating-sample magnetometer and superconducting quantum-interference device.

• Korean Journal of Materials Research
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• v.20 no.12
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• pp.669-675
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• 2010

One of the greatest challenges for our society is providing powerful electrochemical energy conversion and storage devices. Rechargeable lithium-ion batteries and fuel cells are among the most promising candidates in terms of energy and power density. As the starting material, $TiCl_4{\cdot}YCl_3$ solution and dispersing agent (HCP) were mixed and synthesized using ammonia as the precipitation agent, in order to prepare the nano size Y doped spherical $TiO_2$ precursor. Then, the $Li_4Ti_5O_{12}$ was synthesized using solid state reaction method through the stoichiometric mixture of Y doped spherical $TiO_2$ precursor and LiOH. The Ti mole increased the concentration of the spherical particle size due to the addition of HPC with a similar particle size distribution in a well in which $Li_4Ti_5O_{12}$ spherical particles could be obtained. The optimal synthesis conditions and the molar ratio of the Ti 0.05 mol reaction at $50^{\circ}C$ for 30 minutes and at $850^{\circ}C$ for 6 hours heat treatment time were optimized. $Li_4Ti_5O_{12}$ was prepared by the above conditions as a working electrode after generating the Coin cell; then, electrochemical properties were evaluated when the voltage range of 1.5V was flat, the initial capacity was 141 mAh/g, and cycle retention rate was 86%; also, redox reactions between 1.5 and 1.7V, which arose from the insertion and deintercalation of 0.005 mole of Y doping is not a case of doping because the C-rate characteristics were significantly better.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.4
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• pp.864-870
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• 2017

This paper describes a Dual Buck Converter with mode control using variable Frequency to Voltage for portable devices requiring wide load current. The inherent problems of PLL compensation and efficiency degradation in light load current that the conventional hysteretic buck converter has faced have been resolved by using the proposed Dual buck converter which include improved PFM Mode not to require compensation. The proposed mode controller can also improve the difficulty of detecting the load change of the mode controller, which is the main circuit of the conventional dual mode buck converter, and the slow mode switching speed. the proposed mode controller has mode switching time of at least 1.5us. The proposed DC-DC buck converter was implemented by using $0.18{\mu}m$ CMOS process and die size was $1.38mm{\times}1.37mm$. The post simulation results with inductor and capacitor including parasitic elements showed that the proposed circuit received the input of 2.7~3.3V and generated output of 1.2V with the output ripple voltage had the PFM mode of 65mV and 16mV at the fixed switching frequency of 2MHz in hysteretic mode under load currents of 1~500mA. The maximum efficiency of the proposed dual-mode buck converter is 95% at 80mA and is more than 85% efficient under load currents of 1~500mA.

• Restorative Dentistry and Endodontics
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• v.31 no.5
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• pp.371-377
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• 2006

The purposes of this study were to assess the accuracy of measurements in pre-enlarged canals with small instruments and to compare the accuracies, in enlarged canal, with small size instruments and instruments that match the actual canal diameter using Root ZX, Bingo1020, SmarPex, and e-Magic Finder. Ten extracted teeth were embedded in an alginate model made for testing apex locators. A size 10 file was placed into the root canal until the tip of the file reached the plane of the major diameter of the foramen under a dental operating microscope at the 25 x magnification. The measurement was done with digital caliper and defined as actual length. Electronic length measurement with a size 10 file in pre-enlarged canal was done by reading the index indicating Apex of each device to gain a definite value After completion of canal enlargement to a size 45 file, each difference between actual length and electric measurement value with a size 10 and 40 files in enlarged canal was recorded as L10 and L40. The one-way ANOVA and Scheffe's multiple range tests were computed for analyze the differences among the four apex locators in the same group. The Student's t-test between L10 and L40 of each locator was done. The accuracies of electronic measurements were significantly different among the 4 devices. The file size made no difference on the accuracy of electronic measurement in enlarged canal with same device. The e-Magic Finder was the most accurate device among the 4 apex locators used in this study.