• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.7
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• pp.509-512
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• 2010

The thermal distribution of 2D and 3D p-n photovoltaic diode structures with and without surface texturing has been studied. By analysis of the numerical simulation results of the I-V characteristics and lattice temperature distributions the effect of different texturing structures on the characteristics of silicon p-n photovoltaic devices has been studied systematically. The efficiency of the device having surface texturing shows more than ~2% enhancement compared to the reference devices which did not have texturing. In addition, the effect of the density of the texturing groove has been studied and it has been confirmed that the texturing structure not only improves the light trapping but also plays an important role in the heat radiation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.13-18
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• 2007

This paper presents the experimental findings on the different degradation mechanism which depends on the gate oxide thickness in lateral DMOS transistors. For thin oxide devices, the generation of interface states in the channel region and the trapped holes in the drift region is found to be the causes of the device degradation. For thick devices, the generation of interface states in the channel region is found to be the causes of the device degradation. We confirmed the different degradation mechanism using device simulation. From the comparison of device degradation under DC and AC stress, it is found that the device degradation is more significant under DC stress than one under AC stress. The device degradation under AC stress is more significant in high frequency. Therefore the hot carrier induced degradation should be more carefully considered in the design of RF LDMOS transistors and circuit design.

• Proceedings of the Materials Research Society of Korea Conference
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• 2007.11a
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• pp.26.1-26.1
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• 2007

• Proceedings of the KIEE Conference
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• 1989.11a
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• pp.98-100
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• 1989

Langmuir-Blodgett(LB) technique will be used to produce ultra thin film, and then characterization of the physical and electrical properties of LB ultra thin films, this study will be an investigation for the possibilities of the ultra thin films as an Molecular Electronic Device.

• Proceedings of the Korean Vacuum Society Conference
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• 1995.06a
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• pp.149-149
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• 1995

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.11
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• pp.740-745
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• 2014

ZnO nanowires were grown by hydrothermal synthesis process and piezoelectric poly vinylidene fluoride (PVDF) was then coated on top of the ZnO-nanowires by spray-coating technique. The composite layer of ZnO-nanowires/PVDF was applied to an energy harvesting device based on piezoelectric-conversion mechanism. A defined mechanical force was given to the nanogenerator device to evaluate their electric power generation characteristics, where output current density and voltage were examined. Electric power generation property of the ZnO-nanowires/PVDF based nanogenerator device was compared to that of the nanogenerator device with ZnO-nanowires as single active layer. Effect of the ZnO-nanowires on improvement of power generation was discussed to examine its feasibility for the nanogenerator device.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.4
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• pp.1841-1865
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• 2017

This paper proposes a new interference mitigation scheme for device-to-device (D2D) communications underlaying a cellular network. The object of the proposed scheme is to determine the number of data streams, a precoding matrix, and a decoding matrix of D2D networks so as to maximize the system capacity given the number of data streams of a cellular network while satisfying the constraint of the inter-system interference from D2D networks to the cellular network. Unlike existing interference mitigation schemes based on the interference alignment technique, the proposed scheme operates properly regardless of the number of data streams of a cellular network and moreover it does not require changing the precoding and decoding matrices of a cellular network. The simulation results demonstrate that the proposed scheme significantly increases the system capacity by mitigating the intra- and inter-system interference.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.12
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• pp.953-958
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• 2001

The antifuse is a semi-permanent memory device like a ROM which shows the open or short state, and a switch device connecting logic blocks selectively in FPGA. In addition, the antifuse has been used as a logic device to troubleshoot defective memory cells arising from SDRAM processing. In this study, we have fabricated ONO antifuses consisted of PIP structure. The antifuse shows a high resistance more than several G Ω in the normal state, and shows a low resistance less than 500 Ω after program. The program resistance variation according to temperature shows the very stable value of $\pm$20 Ω. At this time, its program voltage shows 6.7∼7.2 V and the program is performed within 1 second. Therefore this result shows that the PIP antifuse is a very stable and programmable logic device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.8
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• pp.587-595
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• 1998

Transient thermal analysis simulations are carried out using a modeling program to understand the human body model HBM ESD. The devices were simulated a one-dimensional device subjected to ESD stress by solving Poison's equation, the continuity equation, and heat flow equation. A ramp rise with peak ESD voltage during rise time is applied to the device under test and then discharged exponentially through the device. LDD and NMOS structures were studied to evaluate ESD performance, snap back voltages, device heating. Junction heating results in the necessity for increased electron concentration in the space charge region to carry the current by the ESD HBM circuit. The doping profile adihacent to junction determines the amount of charge density and magnitude of the electric field, potential drop, and device heating. Shallow slopes of LDD tend to collect the negative charge and higher potential drops and device heating.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1730-1732
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• 2000

Powder Electroluminescent Device is the solid state device which has a low power consumption, large area emission with uniformity, easy manufacturing, simple structure, and flexible mechanically. In this paper, we made the information display with the powder electroluminescent device using back-light and designed the driving circuit.