• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Applied Science and Convergence Technology
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• 제26권5호
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• pp.110-113
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• 2017

The two-dimensional layered $MoS_2$ has high mobility and excellent optical properties, and there has been much research on the methods for using this for next generation electronics. $MoS_2$ is similar to graphene in that there is comparatively weak bonding through Van der Waals covalent bonding in the substrate-$MoS_2$ and $MoS_2-MoS_2$ heteromaterial as well in the layer-by-layer structure. So, on the monatomic level, $MoS_2$ can easily be exfoliated physically or chemically. During the $MoS_2$ field-effect transistor fabrication process of photolithography, when using water, the water infiltrates into the substrate-$MoS_2$ gap, and leads to the problem of a rapid decline in the material's yield. To solve this problem, an epoxy-based, as opposed to a water-based photoresist, was used in the photolithography process. In this research, a hydrophobic $MoS_2$ field effect transistor (FET) was fabricated on a hydrophilic $SiO_2$ substrate via chemical vapor deposition CVD. To solve the problem of $MoS_2$ exfoliation that occurs in water-based photolithography, a PPMA sacrificial layer and SU-8 2002 were used, and a $MoS_2$ film FET was successfully created. To minimize Ohmic contact resistance, rapid thermal annealing was used, and then electronic properties were measured.

• 한국전기전자재료학회논문지
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• 제22권9호
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• pp.717-723
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• 2009

Ni/Al ('/' denotes deposition sequence) contacts were deposited on Al-implanted 4H-SiC for ohmic contact formation, and the conduction properties were characterized and compared with those of Ni-only contacts. The thicknesses of the Ni and Al thin film were 30 nm and 300 nm, respectively, and the films were sequentially deposited bye-beam evaporation without vacuum breaking. Rapid thermal anneal (RTA) temperature was varied as follows : $840^{\circ}C$, $890^{\circ}C$, and $940^{\circ}C$. The specific contact resistivity of the Ni contact was about $^{\sim}2\;{\pm}\;10^{-2}\;{\Omega}{\cdot}cm^2$, However, with the addition of Al overlayer, the specific contact resistivity decreased to about $^{\sim}2\;{\pm}\;10^{-4}\;{\Omega}{\cdot}cm^2$, almost irrespective of RTA temperature. X-ray diffraction (XRD) analysis of the Ni contact confirmed the existence of various Ni silicide phases, while the results of Ni/Al contact samples revealed that Al-contaning phases such as $Al_3Ni$, $Al_3Ni_2$, $Al_4Ni_3$, and $Ab_{3.21}Si_{0.47}$ were additionally formed as well as the Ni silicide phases. Energy dispersive spectroscopy (EDS) spectrum showed interfacial reaction zone mainly consisting of Al and Si at the contact interface, and it was also shown that considerable amounts of Si and C have diffused toward the surface. This indicates that contact resistance lowering of the Ni/Al contacts is related with the formation of the formation of interfacial reaction zone containing Al and Si. From these results, possible mechanisms of contact resistance lowering by the addition of Al were discussed.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.37-37
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• 2010

Silicate-silsesquioxane or siloxane-silsesquioxane hybrid thin films are strong candidates as matrix materials for ultra low dielectric constant (low-k) thin films. We synthesized the silicate-silsesquioxane hybrid resins from tetraethoxyorthosilicate (TEOS) and methyltrimethoxysilane (MTMS) through hydrolysis and condensation polymerization by changing their molar ratios ([TEOS]:[MTMS] = 7:3, 5:5, and 3:7), spin-coating on Si(100) wafers. In the case of [TEOS]:[MTMS] 7:3, the dielectric permittivity value of the resultant thin film was measured at 4.30, exceeding that of the thermal oxide (3.9). This high value was thought to be due to Si-OH groups inside the film and more extensive studies were performed in terms of electronic, ionic, and orientational polarizations using Debye equation. The relationship between the mechanical properties and the synthetic conditions of the silicate-silsesquioxane precursors was also investigated. The synthetic conditions of the low-k films have to be chosen to meet both the low orientational polarization and high mechanical properties requirements. In addition, we have investigated a new solution-based approach to the synthesis of semiconducting chalcogenide films for use in thin-film transistor (TFT) devices, in an attempt to develop a simple and robust solution process for the synthesis of inorganic semiconductors. Our material design strategy is to use a sol-gel reaction to carry out the deposition of a spin-coated CdS film, which can then be converted to a xerogel material. These devices were found to exhibit n-channel TFT characteristics with an excellent field-effect mobility (a saturation mobility of ${\sim}\;48\;cm^2V^{-1}s^{-1}$) and low voltage operation (< 5 V). These results show that these semiconducting thin film materials can be used in low-cost and high-performance printable electronics.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.76-76
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• 2008

The resonance properties due to the surface plasmon(SP) excitation of metal nanoparticles make the nanocomposite films promising for various applications such as optical switching devices. In spite of the well-known ultra-sensitive operation of optical switches based on a guided wave, the application of nanocomposite film(NC) has inherent limitation originating from the excessive optical loss related with the surface plasmon resonance(SPR). In this study, we addressed this problem and present the experimental and theoretical analysis on the pump-probe optical switching in prism-coupled Au(1 vol.%):$SiO_2$ nanocomposite waveguide film. The guided mode was successfully generated using a near infrared probe beam of 1550 nm and modulated with an external pump beam of 532 nm close to the SPR wavelength. We extend our approach to ultra-fast operation using a pulsed laser with 5 ns pulse width. To improve the switching speed through the reduction in thermal loading effect accompanied by the resonant absorption of pump beam light, we adopted a metallic film as a coupling layer instead of low-index dielectric layer between the high-index SF10 prism and NC slab waveguide. We observed great enhancement in switching speed for the case of using metallic coupling layer, and founded a distinct difference in origin of optical nonlinearities induced during switching operation using cw and ns laser.

• 센서학회지
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• 제16권4호
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• pp.313-318
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• 2007

Single-wall carbon nanotube field-effect transistors (SWCNT FETs) of top gate structure were fabricated in a conventional metal-oxide-semiconductor field effect transistor (MOSFET) with gate electrodes above the conduction channel separated from the channel by a thin $SiO_{2}$ layer. The carbon nanotubes (CNTs) directly grown using thin Fe film as catalyst by thermal chemical vapor deposition (CVD). These top gate devices exhibit good electrical characteristics, including steep subthreshold slope and high conductance at low gate voltages. Our experiments show that CNTFETs may be competitive with Si MOSFET for future nanoelectronic applications.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 춘계학술대회 논문집 센서 박막재료연구회 및 광주 전남지부
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• pp.15-17
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• 2008

$CuInS_2$ thin films were synthesized by sulpurization of Cu/In Stacked elemental layer deposited onto glass Substrates by vacuum furance annealing at temperature 200[$^{\circ}C$]. And structural and electrical properties were measured in order to certify optimum conditions for growth of the ternary compound semiconductor $CuInS_2$ thin films with non-stoichiometry composition. $CuInS_2$ thin film was well made at the heat treatment 200[$^{\circ}C$] of SLG/Cu/In/S stacked elemental layer which was prepared by thermal evaporator, and chemical composition of the thin film was analyzed nearly as the proportion of 1 : 1 : 2. Physical properties of the thin film were investigated at various fabrication conditions substrate temperature, annealing and temperature, annealing time by XRD, FE-SEM and hall measurement system. At the same time, carrier concentration, hall mobility and resistivity of the thin films was $9.10568{\times}10^{17}[cm^{-3}]$, 312.502[$cm^2/V{\cdot}s$] and $2.36{\times}10^{-2}[{\Omega}{\cdot}cm]$, respectively.

• 한국전기전자재료학회논문지
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• 제25권8호
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• pp.602-610
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• 2012

The powders for the $Na_xWO_3$ (x= 1 and 0.75) sputtering targets were synthesized by the calcination in reductive atmosphere. Near single-phase $NaWO_3$ and single-phase $Na_{0.75}WO_3$ powder targets were prepared. By using the targets, thin films of each composition were deposited by rf magnetron sputtering on the $SiO_2$ (100 nm)/Si substrates and annealed by RTP (rapid thermal processing) for crystallization. In the case of the $NaWO_3$ composition, single-phase $Na_xWO_3$ thin films, where x was believed to be slightly less than 1, were fabricated accompanying the Na-diffusion into the substrates during RTP. However, in the case of the $Na_{0.75}WO_3$ thin film preparation, it was unable to make single-phase thin films. From the phase formation behaviors of both powders and thin films, it was revealed that $Na_xWO_3$ with nonstoichiometric composition of x, which was slightly less than 1, was favorable. The good electrical conduction properties were obtained from the single-phase $Na_xWO_3$ thin films. Their electrical resistivities were as low as $7.5{\times}10^{-4}{\Omega}{\cdot}cm$.

• 한국전기전자재료학회논문지
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• 제12권1호
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• pp.62-68
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• 1999

Ferroelectric $Sr_{0.7}/B_{2.3}(Ta_{1-x}Nb_x)_2O_9$(x=0, 0.1, 0.2, 0.3) thin films were deposited on $Pt/SiO_2/Si$ substrate by MOD(Metalorganic Decomposition) process. Metal carboxylate and metal alkoxide were used as precursors, and 2-methoxyethanol, xylene as solvents. After spin coating, thin films were pre-annealed at $400^{\circ}C$, followed by RTA(Rapid Thermal Annealing) and final annealing at $800^{\circ}C$ in oxygen atmosphere. These procedures were repeated three times to obtain thin films with the thickness of $2000{\AA}$. To enhance the nucleation and growth of layered-perovskite phase, thin films were rapid-thermally annealed above $720^{\circ}C$ in oxygen atmosphere. As RTA temperature increased, fluorite phase was transformed to layered-perovskite phase. And the change of Nb contents affected dielectric / electrical properties and microstructure. The ferroelectric characteristics of $Sr_{0.7}/B_{2.3}(Ta_{1-x}Nb_x)_2O_9$ thin film were Pr=8.67 $\mu{C}/cm^2$, Ec=62.4kV/cm and $I_{L}=1.4\times10^{-7}A/cm^2$ at the applied voltage of 5V, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 광주전남지부
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• pp.68-70
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• 2006

$CuInS_2$ thin films were synthesized by sulpurization of Cu/In Stacked elemental layer deposited onto glass Substrates by vacuum furance annealing at temperature 200[$^{\circ}C$]. And structural and electrical properties were measured in order to certify optimum conditions for growth of the ternary compound semiconductor $CuInS_2$ thin films with non-stoichiometry composition. $CuInS_2$ thin film was well made at the heat treatment 200 [$^{\circ}C$] of SLG/Cu/In/S stacked elemental layer which was prepared by thermal evaporator, and chemical composition of the thin film was analyzed nearly as the proportion of 1:1:2. Physical properties of the thin film were investigated at various fabrication conditions substrate temperature, annealing and temperature, annealing time by XRD, FE-SEM and hall measurement system. At the same time, carrier concentration, hall mobility and resistivity of the thin films was $9.10568{\times}10^{17}[cm^{-3}]$, $312.502[cm^2/V{\cdot}s]$ and $2.36{\times}10^{-2}[{\Omega}{\cdot}cm]$, respectively.