• Title/Summary/Keyword: Electronic and thermal properties

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Fabrication and Reliability Properties of Thin film Resistors with Low Temperature Coefficient of Resistance (낮은 저항온도계수를 갖는 박막 저항체 제작 및 신뢰성 특성 평가)

  • Lee, Boong-Joo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.4
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    • pp.352-356
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    • 2007
  • The Ni/Cr/Al/Cu (51/41/4/4 wt%) thin films were deposited by using DC magnetron sputtering method for the application of the resistors having low TCR (temperature coefficients of resistance) and high resistivity from the former printed-results[3]. The TCR values measured on the as-deposited thin film resistors were less than ${\pm}10\;ppm/^{\circ}C$ and $-6{\sim}+1\;ppm/^{\circ}C$ after annealing and packaging process. The TCR values were $-3{\sim}1\;ppm/^{\circ}C$ (ratio of variation : about 0.02 %) and $-30{\sim}20\;ppm/^{\circ}C$ (ratio of variation : about $0.5{\sim}1\;%$) for the thermal cycling and PCT (pressure cooker test), respectively. It was confirmed that the reliability properties of the thin film resistor were good for electronic components.

New Solid-phase Crystallization of Amorphous Silicon by Selective Area Heating

  • Kim, Do-Kyung;Jeong, Woong-Hee;Bae, Jung-Hyeon;Kim, Hyun-Jae
    • Journal of Information Display
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    • v.10 no.3
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    • pp.117-120
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    • 2009
  • A new crystallization method for amorphous silicon, called selective area heating (SAH), was proposed. The purpose of SAH is to improve the reliability of amorphous silicon films with extremely low thermal budgets to the glass substrate. The crystallization time shortened from that of the conventional solid-phase crystallization method. An isolated thin heater for SAH was fabricated on a quartz substrate with a Pt layer. To investigate the crystalline properties, Raman scattering spectra were used. The crystalline transverse optic phonon peak was at about 519 $cm^{-1}$, which shows that the films were crystallized. The effect of the crystallization time on the varying thickness of the $SiO_2$ films was investigated. The crystallization area in the 400nm-thick $SiO_2$ film was larger than those of the $SiO_2$ films with other thicknesses after SAH at 16 W for 2 min. The results show that a $SiO_2$ capping layer acts as storage layer for thermal energy. SAH is thus suggested as a new crystallization method for large-area electronic device applications.

RF Bias Effect of ITO Thin Films Reactively Sputtered on PET Substrates at Room Temperature

  • Kim, Hyun-Hoo;Shin, Sung-Ho
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.3
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    • pp.122-125
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    • 2004
  • ITO films were deposited on polyethylene terephthalate substrate by a dc reactive magnetron sputtering using rf bias without substrate heater and post-deposition thermal treatment. The dependency of rf substrate bias on plasma sputter processing was investigated to control energetic particles and improve ITO film properties. The substrate was applied negative rf bias voltage from 0 to -80 V. The composition of indium, tin, and oxygen atoms is strongly depended on the rf substrate bias. Oxygen deficiency is the highest at rf bias of -20 V. The electrical and optical properties of ITO films also are dominated obviously by negative rf bias.

Fabrication and Characteristics of MMIC Substrate using Oxidation of Porous Silicon (다공질 실리콘 산화법을 이용한 MMIC 기판의 제조 및 그 특성)

  • Kwon, O.J.;Kim, K.J.;Lee, J.S.;Lee, J.H.;Choi, H.C.;Lee, J.H.;Kim, K.W.
    • Journal of Sensor Science and Technology
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    • v.8 no.2
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    • pp.202-209
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    • 1999
  • Microstrip line was fabricated on the oxidized porous silicon layer which has nearly electrically and chemically identical properties with thermally oxidized silicon layer. Thick oxidized porous silicon layer of few tenth of micrometers was prepared by thermal oxidation of porous silicon layer on silicon substrate. Multi-step thermal oxidation process was used to obtain high Quality and thick oxidized silicon layer and to release thermal stress. Microstrip line was fabricated on the oxidized porous silicon layer. Its microwave characteristics were measured and the availability for MMIC substrate was investigated.

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Heat Dissipation Analysis of High Voltage Diode Package for Microwave oven (전자레인지용 고압다이오드의 방열특성)

  • Kim, Sang-Cheol;Kim, Nam-Kyun;Bahng, Wook;Seo, Gil-Soo;Moon, Seoung-Ju;Oh, Bang-Won
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11b
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    • pp.205-208
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    • 2001
  • Steady state and transient thermal analysis has been done by a finite element method in a diode of 12kV blocking voltage for microwave oven. The diode was fabricated by soldering ten pieces of 1200V diodes in series, capping a dummy wafer at the far end of diode series, and finally copper wire bonded for building anode and cathode terminal. In order to achieve high voltage and reliability, the edge of each diode was beveled and passivated by resin and epoxy with a thickness of $25{\mu}m$ and $3700{\mu}m$, respectively. The chip size, thickness and material properties were very important factor for high voltage diode package. And also, thermal stress value was highest in the edge of diode and solder. So, design of edge in silicon was very important to thermal stress.

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Heat Dissipation Analysis of High Voltage Diode Package for Microwave oven (전자레인지용 고압다이오드의 방열특성)

  • Kim, Sang-Cheol;Kim, Nam-Kyun;Bahng, Wook;Seo, Gil-Soo;Moon, Seoung-Ju;Oh, Bang-Won
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.205-208
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    • 2001
  • Steady state and transient thermal analysis has been done by a finite element method in a diode of 12kV blocking voltage for microwave oven. The diode was fabricated by soldering ten pieces of 1200V diodes in series, capping a dummy wafer at the far end of diode series, and finally copper wire bonded for building anode and cathode terminal. In order to achieve high voltage and reliability, the edge of each diode was beveled and passivated by resin and epoxy with a thickness of 25$\mu\textrm{m}$ and 3,700$\mu\textrm{m}$, respectively. The chip size, thickness and material properties were very important factor for high voltage diode package. And also, thermal stress value was highest in the edge of diode and solder. So, design of edge in silicon was very important to thermal stress.

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Implementation of BSCT $320{\times}240$ IR-FPA for Uncooled Thermal Imaging System (비냉각 열 영상 시트템용 BSCT $320{\times}240$ IR-FPA의 구현)

  • Kang, Dae-Seok;Shin, Gyeong-Uk;Park, Jae-U;Yoon, Dong-Han;Song, Seong-Hae;Han, Myeong-Su
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.11
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    • pp.7-13
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    • 2002
  • BSCT 320${\times}$240 IRFPA detector module is implemented, which is a key component in uncooled thermal imaging systems. The detector module consists of two parts, infrared sensitive pixel array and read-out integrated circuit(ROIC). The BSCT 320${\times}$240 pixels are made by laser scribe process and 10-${\mu}m$ micro-bump to satisfy 50-${\mu}m$ pitch and 95-% fill-factor. The ROIC has been designed to electrically address the pixels sequentailly and to improve signal-to-noise ratio with single transistor amplifier, HPF, tunable LPF and clamp circuit. The fabricated hybrid chip of detector and ROIC has been mounted on the TEC built-in ceramic package for more stable operation and tested for lots of electrical and optical properties. The IRFA sample has shown successful properties and met with good results of fill-factor, detectivity and responsivity.

Glass Forming Stability in Chalcogenide-based GeSbSe Materials for IR-Lens (적외선 렌즈용 Ge-Sb-Se계 칼코게나이드의 유리안정성 평가)

  • Jung, Gun-Hong;Kong, Heon;Yeo, Jong-Bin;Lee, Hyun-Yong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.4
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    • pp.204-209
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    • 2017
  • Thermal and structural stability in the glass transition region of chalcogenide glasses has been investigated in terms of thermodynamics for application to various optoelectronic devices. In this study, the compositions of $Ge_xSb_{20}Se_{80-x}$ (x = 10, 15, 20, 25, and 30) were selected to investigate the glass stability according to germanium ratios. The chalcogenide bulks were fabricated by using a traditional melt-quenching method. Thin films were deposited by a thermal evaporation system, maintaining the deposition ratio of $3{\sim}5{\AA}$ in order to have uniformity. The thermal and structural properties were measured by a differential scanning calorimeter (DSC) and X-ray diffraction (XRD). The DSC analysis provided thermal parameters and theoretical glass region stabilities. The XRD analysis supported the theoretical stabilities because of where the crystallization peak data occurred.

Controlling Work Function of Graphene by Chemical Doping

  • Lee, Ji-A
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.628-628
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    • 2013
  • Graphene, a single layer of graphite, has raised extensive interest in a wide scientific community for its extraordinary thermal, mechanical, electrical and other properties [1,2]. However, because of zero-band gap of graphene, it is difficult to apply for electronic applications. To overcome this problem, chemical doping is one of way to opening grahene bandgap. According to experimental results, by changing doping concentration and doping time, it is possible to control work function of graphene. We can obtain results through raman spectroscopy, UPS, Sheet resistance. Moreover, electronic properties of doped graphene were studied by making field effect transistors. We were able to control the doping concentration, dirac point of graphene and work function of graphene by formng n-type, p-type doping materials. In this research, the chemicals of diazonium salts, viologen, etc. were used for extrinsic doping.

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Electrochemical Properties of FeS2 Thin Film Electrodes for Thermal Batteries (열전지용 FeS2 박막전극의 전기화학적 특성)

  • Im, Chae-Nam
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.5
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    • pp.318-324
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    • 2017
  • Powder compaction technology is widely used to prepare thermal battery components. This method, however, is limited by the size, thickness, and geometry of the battery components. This limitation leads to excessive cell capacity, overweight, and higher cost of the pellets, which decreases the specific capacities and delays the activation time of thermal batteries. $FeS_2$ thin-film cathodes were fabricated by tape-casting technology and analyzed by SEM and EDS in this paper. The residual organic binder of the $FeS_2$ thin-film cathodes decreased with the temperature of the heat treatment, which improved the specific capacity because of the lower resistance. Specific capacities of the $FeS_2$ thin-film cathodes decreased because of the higher residual binder and the restrictive reaction of active materials with molten salts as the thickness increased. $FeS_2$ thin-film cathodes showed much higher specific capacity (1,212.2 As/g) than pellet cathodes (860.7 As/g) at the optimal heat-treatment temperature ($230^{\circ}C$).