• The Journal of the Korea institute of electronic communication sciences
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• v.5 no.2
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• pp.158-163
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• 2010

In this paper, we implemened the simplified Chua's circuit which is replace L to C by real hardware implementation. Because L element has a difficult problem to make a real hardware, L has a saturation characteristic and we also compare with previous Chua's circuit as the result of chaostic attractors creation.

• International Journal of Automotive Technology
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• v.8 no.2
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• pp.203-209
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• 2007

As the vehicle electronic control technology quickly grows and becomes more sophisticated, a more efficient means than the traditional in-vehicle driving test is required for the design, testing, and tuning of electronic control units (ECU). For this purpose, the hardware-in-the-loop simulation (HILS) scheme is very promising, since significant portions of actual driving test procedures can be replaced by HIL simulation. The HILS incorporates hardware components in the numerical simulation environment, and this yields results with better credibility than pure numerical simulations can offer. In this study, a HILS system has been developed for ESP (Electronic Stability Program) ECUs. The system consists of the hardware component, which that includes the hydraulic brake mechanism and an ESP ECU, the software component, which virtually implements vehicle dynamics with visualization, and the interface component, which links these two parts together. The validity of HIL simulation is largely contingent upon the accuracy of the vehicle model. To account for this, the HILS system in this research used the commercial software CarSim to generate a detailed full vehicle model, and its parameters were set by using design data, SPMD (Suspension Parameter Measurement Device) data, and data from actual vehicle tests. Using the developed HILS system, performance of a commercial ESP ECU was evaluated for a virtual vehicle under various driving conditions. This HILS system, with its reliability, will be used in various applications that include durability testing, benchmarking and comparison of commercial ECUs, and detection of fault and malfunction of ESP ECUs.

• Journal of Aerospace System Engineering
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• v.16 no.4
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• pp.10-16
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• 2022

Since aviation systems are developed as the complex form of software a hardware, the necessity to apply to relevant guidelines is increasing. It is however uncommon that international development guidelines regarding electronic hardware are applied to current domestic aviation systems. In this paper, we compare and analyze DO-254 and ECSS-Q-ST-60-02C, electronic hardware development guidelines with the case of KASS (Korea Augmentation Satellite System) Performance Suitability, based on the project of SBAS (Satellite Based Augmentation System) development and construction.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.12a
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• pp.165-168
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• 2000

In this paper, we propose a method, an optimized architecture of a device with an image signal process of a field unit to minimize the flick phenomenon that happens in direction of a color temperature at a color tone change. The proposed IIR loop filter has an optimized architecture and reduced hardware compared with previous filters. In order to achieve the optimization for the hardware complexity. It is designed by time-multiplexing architecture. The proposed IIR loop filter is synthesized by using the STD90 0.35um cell library.

• Journal of Sensor Science and Technology
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• v.10 no.5
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• pp.279-285
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• 2001

The capnograph system for determining the partial pressure of carbon dioxide in the blood of a patient was developed based on the NDIR(non-dispersive infrared) absorption technology. NDIR gas analyzing method requires an optical absorption chamber and signal processing hardware. In this paper, we have designed and implemented NDIR type $CO_2$ gas chamber in consideration of the time response characteristics and lamp chopping frequency. And we have implemented signal processing hardware using two infrared sources to reduce the thermal background effect. The implemented gas chamber and signal processing hardware were tested in the temperature variation experiment and human expiratory experiment. The results showed that the system could produce a stable output signal and a good $CO_2$ gas concentration curve like a typical capnogram.

• ETRI Journal
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• v.45 no.2
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• pp.254-266
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• 2023

This paper investigates the effect of hardware impairments (HIs) and imperfect channel state information (ICSI) on a SWIPT-assisted adaptive nonorthogonal multiple access (NOMA)/orthogonal multiple access (OMA) system over independent and nonidentical Rayleigh fading channels. In the NOMA mode, the energy-constrained near users act as a relay to improve the performance for the far users. The OMA transmission mode is adopted to avoid a complete outage when NOMA is infeasible. The best user selection scheme is considered to maximize the energy harvested and avoid error propagation. To characterize the performance of the proposed systems, closed-form and asymptotic expressions of the outage probability for both near and far users are studied. Moreover, exact and approximate expressions of the ergodic rate for near and far users are investigated. Simulation results are provided to verify our theoretical analysis and confirm the superiority of the proposed NOMA/OMA scheme in comparison with the conventional NOMA and OMA protocol with/without HIs and ICSI.

• Journal of IKEEE
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• v.6 no.1 s.10
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• pp.80-86
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• 2002

This paper presents a fast hardware architecture to implement a 2-D DWT(Discrete Wavelet Transform) computed by lifting scheme framework. The conventional 2-D DWT hardware architecture has problem in internal memory, hardware resource, and latency. The proposed architecture was based on the 4-way partitioned data set. This architecture is configured with a pipelining parallel architecture for 4-way partitioning method. Due to the use of this architecture, total latency was improved by 50%, and memory size was reduced by using lifting scheme.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.183-183
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• 2010

3D Display type have software and hardware architecture in generally got low transmittance characteristics and high price product equipment. In this article, specified polarizer adopted MLA type structure have 3D display with hardware configuration and high transmission wide view angle. Method of screen printing type is adopted B/L system with simple structure.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.9 no.4
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• pp.414-418
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• 2016

In this paper, a hardware architecture of low area gradient magnitude calculator is proposed. For the hardware complexity reduction, the characteristic of orthogonal projection vector and hardware resource sharing technique are applied. The proposed hardware architecture can be implemented without degradation of the gradient magnitude data quality since the proposed hardware is implemented with original algorithm. The FPGA implementation result shows the 15% of logic elements and 38% embedded multiplier savings compared with previous work using Altera Cyclone VI (EP4CE115F29C7N) FPGA and Quartus II v15.0 environment.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.2
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• pp.141-146
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• 2017

In this paper, a gradient magnitude hardware architecture based on hardware folding design method is proposed for low power image feature extraction. For the hardware complexity reduction, the projection vector chracteristic of gradient magnitude is applied. The proposed hardware architecture can be implemented with the small degradation of the gradient magnitude data quality. The FPGA implementation result shows the 41% of logic elements and 62% embedded multiplier savings compared with previous work using Altera Cyclone VI (EP4CE115F29C7N) FPGA and Quartus II v16.0 environment.