• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.1011-1012
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• 2006

In this paper, implementation process of standard platform for T-DMB Receiver in low-cost and small-size are following: First, implement SoC for 32 bit RISC CPU and 16 bit DSP, Hardware H.264 CODEC, Post Processor or Video Display, Audio Processor, I/O Device. Second, implement Real Time OS for flexible application. Third, propose simple architecture for interface with peripheral devices using one-chip processor.

• 제어로봇시스템학회:학술대회논문집
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• 1998.10a
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• pp.173-178
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• 1998

The strategy presented in this paper is based on modifying the past patterens and adjusting the content of the driving patterns by a new algorithm. Learning happens during the driving procedure of a mobile vehicle. The purpose of this paper is to solve the problem how to realize the hardware neurocomputer by back propagation (BP) neural network learning on-line.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.123-124
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• 2007

In this paper a comparison of several coarse time synchronization(CTS) algorithms for OFDM is presented. The goal of a CTS is to achieve a timing estimate that avoids IST in the receiver. Five coarse timing estimation algorithms are examined and their performances are compared associated with hardware complexity. Simulations has been performed for DVB-T 2K system in thee different channels.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.989-992
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• 1993

In this paper, we describe hardware architecture of fuzzy processors for reasoning involving fuzzy control“Heuristics”. This we believe will lead to fuzzy systems that are closer to the way humans process domain knowledge for decision making. One noticeable beneficial effect based on our notion of fuzzy heuristics is the significantly reduced number of rules required.

• Proceedings of the Korean Information Science Society Conference
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• 2007.06b
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• pp.381-384
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• 2007

본 논문에서는 최신 정지영상 압축표준인 JPEG2000에 이용되는 알고리즘인 이산 웨이블렛 변환(이하이산 웨이브릿 변환)을 위한 전용 하드웨어의 파이프라인 설계를 제안한다. 본 연구에서는 3-level 이산 웨이브릿 변환기를 효과적으로 설계하기 위해서 파이프라라인 기법으로 데이터의 처리속도를 개선하였다. Xilinx FPGA를 대상으로 한 실험 결과 면적은 약 24%증가된 반면에 throughput은 약 50%정도 향상되었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.506-507
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• 2007

Lateral Information Propagation Neural Networks (LIPN) is proposed for on-line interpolation. The proposed neural network technique is the real time computation method through the inter-node diffusion. In the network, a node corresponds to a state in the quantized input space. Through several simulation experiments, real time reconstruction of the nonlinear image information is processed.

• ETRI Journal
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• v.35 no.1
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• pp.109-119
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• 2013

Static testing of analog-to-digital (A/D) and digital-to-analog (D/A) converters becomes more difficult when they are embedded in a system on chip. Built-in self-test (BIST) reduces the need for external support for testing. This paper proposes a new static BIST structure for testing both A/D and D/A converters. By sharing test circuitry, the proposed BIST reduces the hardware overhead. Furthermore, test time can also be reduced using the simultaneous test strategy of the proposed BIST. The proposed method can be applied in various A/D and D/A converter resolutions and analog signal swing ranges. Simulation results are presented to validate the proposed method by showing how linearity errors are detected in different situations.

• Proceedings of the KOSOMBE Conference
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• v.1995 no.11
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• pp.90-94
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• 1995

In this paper, we improved the O-Ring Measurement System(O-R MS) based on oriental constitutional theory of four classes for objectify constitutional diagnosis by O-Ring test method which is one of effective methods in several constitutional diagnosis. The result of using in a half of year, some problems are pointed out. To settle these problems, we improved the actuator, display module, sensor module, and hardware of controller. Also, the software is supplemented to using the more decision parameters. It is estimated to have a high practical use for the objectified constitutional diagnosis.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.05b
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• pp.1201-1204
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• 2003

현재는 IPv4의 주소 체계를 사용하여 많은 단말기들이 인터넷에 연결되고 있다. 32비트 주소 체계인 IPv4는 앞으로 유비쿼터스 환경에서 모든 단말기에 주소를 할당 할 수 없는 문제점을 가지고 있다. 이런 문제점을 해결하기 위해 새로운 주소 체계인 IPv6가 연구되고 있다. 현재의 주소 체계를 사용하고 있는 대부분의 단말기들과 IPv6의 주소 체계를 사용하는 단말기들을 직접 연결하는 것은 불가능하다. IPv4에서 IPv6의 주소 체계로 넘어가는 과도기적 단계에서 두 프로토콜 간외 상호 변환이 필요하다. 본 논문에서는 IPv4와 IPv6의 변환 기술인 SIIT(Stateless IP/ICMP Translator)를 하드웨어로 설계하기 위하여 VHDL로 모델링 하였으며 FPGA에서 검증하였다.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.742-745
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• 1988

Control algorithm for remote transmission processing system for ECG signals is proposed. Software for the system hardware consists of system control algorithm and signal processing algorithm. Since signal processing algorithm is now under developing, this paper describes the details of system control only.